Pstate Infrastructure & Support config data required for active state

- Support all config data required for active state.
- Set 'active ready' bit in poll response when all config data has been received.
- Rewrite & rename proc_gpsm_pstate_initialize() - Delete GPSM, doesn't exist.
- Put in TODO call PGPE to enable pstates this will also be telling PGPE how to
  set PMCR mode register (OCC control pstates or OPAL).
- Initialize globals for fmax, fmin, pmax and mhz_per_pstate with temporary hard
  codes until PGPE is available.
- Call to "proc_pstate_initialize()" moved to state transition to observation
- Cleanup proc_freq2pstate()
- rewrite amec_slv_freq_smh()
  - the calls to proc_set_core_bounds() and proc_set_core_pstate() will be
    replaced with 1 IPC call to the PGPE to set pmin/pmax given all cores
    or set pstate for all given cores.
- Remove all DCM related code.

Change-Id: I449d188b2cffc345afca19717dcbea037f159114
RTC:130224
RTC:150935
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23977
Tested-by: FSP CI Jenkins
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>

7 files changed, 64 insertions, 185 deletions

diff --git a/src/occ_405/amec/amec_data.c b/src/occ_405/amec/amec_data.c
index 97aa8a7..61af8fe 100755
--- a/src/occ_405/amec/amec_data.c
+++ b/src/occ_405/amec/amec_data.c
@@ -64,6 +64,8 @@
 // Globals
 //*************************************************************************
 extern uint8_t G_occ_interrupt_type;
+extern uint32_t G_proc_fmin;
+extern uint32_t G_proc_fmax;
 
 //*************************************************************************
 // Function Prototypes
@@ -112,8 +114,8 @@ errlHndl_t AMEC_data_write_fcurr(const OCC_MODE i_mode)
     // min/max for AMEC component
     if(G_occ_interrupt_type != FSP_SUPPORTED_OCC)
     {
-        g_amec->sys.fmax = G_sysConfigData.sys_mode_freq.table[OCC_MODE_TURBO];
-        g_amec->sys.fmin = G_sysConfigData.sys_mode_freq.table[OCC_MODE_MIN_FREQUENCY];
+        g_amec->sys.fmax = G_proc_fmax;
+        g_amec->sys.fmin = G_proc_fmin; // = G_sysConfigData.sys_mode_freq.table[OCC_MODE_MIN_FREQUENCY]
 
         TRAC_INFO("AMEC_data_write_fcurr: New frequency range Fmin[%u] Fmax[%u]",
                   g_amec->sys.fmin,
diff --git a/src/occ_405/amec/amec_freq.c b/src/occ_405/amec/amec_freq.c
index 025e088..ea14c29 100755
--- a/src/occ_405/amec/amec_freq.c
+++ b/src/occ_405/amec/amec_freq.c
@@ -501,6 +501,9 @@ void amec_slv_voting_box(void)
     }
 }
 
+#endif // @TODO - TEMP - Code not ready yet
+
+
 // Function Specification
 //
 // Name: amec_slv_freq_smh
@@ -518,8 +521,8 @@ void amec_slv_freq_smh(void)
     /*------------------------------------------------------------------------*/
     /*  Local Variables                                                       */
     /*------------------------------------------------------------------------*/
-    uint16_t                        k = 0;
-    int8_t                          l_pstate = 0;
+    uint16_t      k = 0;
+    Pstate        l_pstate[MAX_NUM_CORES];
 
     /*------------------------------------------------------------------------*/
     /*  Code                                                                  */
@@ -527,30 +530,24 @@ void amec_slv_freq_smh(void)
 
     for (k=0; k<MAX_NUM_CORES; k++)
     {
-        switch (g_amec->proc[0].core[k].f_sms)
-        {
-            case AMEC_CORE_FREQ_IDLE_STATE:
-                // Translate frequency request into a Pstate
-                l_pstate = proc_freq2pstate(g_amec->proc[0].core[k].f_request);
+        // Translate frequency requests into pstates
+        l_pstate[k]= proc_freq2pstate(g_amec->proc[0].core[k].f_request);
+    }
 
-                // Fall through
-            case AMEC_CORE_FREQ_PROCESS_STATE:
-                if(G_sysConfigData.system_type.kvm)
-                {
-                    // update core bounds on kvm systems
-                    proc_set_core_bounds(gpst_pmin(&G_global_pstate_table) + 1, (Pstate) l_pstate, k);
-                }
-                else
-                {
-                    // update core pstate request on non-kvm systems
-                    proc_set_core_pstate((Pstate) l_pstate, k);
-                }
-                break;
-        }
+    // TODO: if this is an OPAL system, send PGPE an IPC to set clipping bounds
+    //       otherwise, set send PGPE an IPC to set pstates
+
+    if(G_sysConfigData.system_type.kvm)
+    {
+        // Send IPC with G_proc_pmin and l_pstate to set pmin and pmax clips
     }
+    else
+    {
+        // send an IPC with l_pstate to set pstates for all Cores
+    }
+
 }
 
-#endif // @TODO - TEMP - Code not ready yet
 
 // Function Specification
 //
diff --git a/src/occ_405/amec/amec_oversub.c b/src/occ_405/amec/amec_oversub.c
index beff792..3aaf6ac 100755
--- a/src/occ_405/amec/amec_oversub.c
+++ b/src/occ_405/amec/amec_oversub.c
@@ -110,9 +110,6 @@ void amec_oversub_isr(void)
         // If RTL doesn't control it, do it here
         if(g_amec->oversub_status.oversubLatchAmec == 0)
         {
-            // Set PMC Pmax_clip to Pmin and throttle all Cores via OCI write to PMC
-            amec_oversub_pmax_clip(gpst_pmin(&G_global_pstate_table));
-
             // TODO: Throttle all Centaurs via PORE-GPE by setting 'Emergency Throttle'
 
             g_amec->oversub_status.oversubReasonLatchCount = OVERSUB_REASON_DELAY_4MS;
@@ -150,6 +147,7 @@ void amec_oversub_isr(void)
 
 }
 
+
 // Function Specification
 //
 // Name: amec_oversub_check
diff --git a/src/occ_405/amec/amec_parm_table.c b/src/occ_405/amec/amec_parm_table.c
index 282a695..cbd994d 100755
--- a/src/occ_405/amec/amec_parm_table.c
+++ b/src/occ_405/amec/amec_parm_table.c
@@ -118,9 +118,6 @@ amec_parm_t g_amec_parm_list[] = {
     AMEC_PARM_UINT16(PARM_SYS_FMAX,"sys_fmax",&g_amec_sys.sys.fmax),
     AMEC_PARM_UINT16(PARM_SYS_FMIN,"sys_fmin",&g_amec_sys.sys.fmin),
 
-    // Global Pstate table
-// @TODO - TEMP - global state table changes in P9
-//    AMEC_PARM_RAW(PARM_GPST,"gpst",&G_global_pstate_table,sizeof(GlobalPstateTable)),
     // MHz per pstate
     AMEC_PARM_UINT32(PARM_PSTATE_MHZ,"pstate_mhz",&G_mhz_per_pstate),
     // frequency reason code per-core
diff --git a/src/occ_405/amec/amec_sensors_power.c b/src/occ_405/amec/amec_sensors_power.c
index ef70864..fd3e950 100755
--- a/src/occ_405/amec/amec_sensors_power.c
+++ b/src/occ_405/amec/amec_sensors_power.c
@@ -433,69 +433,60 @@ void amec_update_vrm_sensors(void)
     /*  Code                                                                  */
     /*------------------------------------------------------------------------*/
 
-    // Check if we have access to SPIVID. In DCMs only Master OCC has access to
-    // the SPIVID.
-    if (G_dcm_occ_role == OCC_DCM_MASTER)
+    // VR_FAN and SOFT_OC come from SPIVID
+    l_rc = vrm_read_state(SPIVRM_PORT(0),
+                          &l_minus_np1_regmode,
+                          &l_minus_n_regmode,
+                          &l_vrfan,
+                          &l_softoc);
+    if (l_rc == 0)
     {
-        // VR_FAN and SOFT_OC come from SPIVID
-        l_rc = vrm_read_state(SPIVRM_PORT(0),
-                            &l_minus_np1_regmode,
-                            &l_minus_n_regmode,
-                            &l_vrfan,
-                            &l_softoc);
-
-        if (l_rc == 0)
-        {
-            // Update the VR_FAN sensor
-            sensor_update( AMECSENSOR_PTR(VRFAN250USPROC), (uint16_t)l_vrfan );
+        // Update the VR_FAN sensor
+        sensor_update( AMECSENSOR_PTR(VRFAN250USPROC), (uint16_t)l_vrfan );
 
-            // Clear our error count
-            L_error_count = 0;
+        // Clear our error count
+        L_error_count = 0;
 
-            // No longer reading gpio from APSS in GA1 due to instability in
-            // APSS composite mode
-            //apss_gpio_get(l_pin, &l_pin_value);
+        // No longer reading gpio from APSS in GA1 due to instability in
+        // APSS composite mode
+        //apss_gpio_get(l_pin, &l_pin_value);
 
-            // VR_HOT sensor is a counter of number of times the VRHOT signal
-            // has been asserted
-            l_vrhot_count = AMECSENSOR_PTR(VRHOT250USPROC)->sample;
+        // VR_HOT sensor is a counter of number of times the VRHOT signal
+        // has been asserted
+        l_vrhot_count = AMECSENSOR_PTR(VRHOT250USPROC)->sample;
 
-            // Check if VR_FAN is asserted AND if 'fans_full_speed' GPIO is ON.
-            // Note that this GPIO is active low.
-            if (AMECSENSOR_PTR(VRFAN250USPROC)->sample && !(l_pin_value))
-            {
-                // VR_FAN is asserted and 'fans_full_speed' GPIO is ON,
-                // then increment our VR_HOT counter
-                if (l_vrhot_count < g_amec->vrhotproc.setpoint)
-                {
-                    l_vrhot_count++;
-                }
-            }
-            else
+        // Check if VR_FAN is asserted AND if 'fans_full_speed' GPIO is ON.
+        // Note that this GPIO is active low.
+        if (AMECSENSOR_PTR(VRFAN250USPROC)->sample && !(l_pin_value))
+        {
+            // VR_FAN is asserted and 'fans_full_speed' GPIO is ON,
+            // then increment our VR_HOT counter
+            if (l_vrhot_count < g_amec->vrhotproc.setpoint)
             {
-                // Reset our VR_HOT counter
-                l_vrhot_count = 0;
+                l_vrhot_count++;
             }
-            sensor_update(AMECSENSOR_PTR(VRHOT250USPROC), l_vrhot_count);
         }
         else
         {
-            // Increment our error count
-            L_error_count++;
-
-            // Don't allow the error count to wrap
-            if (L_error_count == 0)
-            {
-                L_error_count = 0xFF;
-            }
+            // Reset our VR_HOT counter
+            l_vrhot_count = 0;
         }
+        sensor_update(AMECSENSOR_PTR(VRHOT250USPROC), l_vrhot_count);
     }
-
-    if( 1 )
+    else
     {
-        sensor_update( AMECSENSOR_PTR(VRFAN250USMEM), 0 );
-        sensor_update( AMECSENSOR_PTR(VRHOT250USMEM), 0 );
+        // Increment our error count
+        L_error_count++;
+
+        // Don't allow the error count to wrap
+        if (L_error_count == 0)
+        {
+            L_error_count = 0xFF;
+        }
     }
+
+    sensor_update( AMECSENSOR_PTR(VRFAN250USMEM), 0 );
+    sensor_update( AMECSENSOR_PTR(VRHOT250USMEM), 0 );
 }
 
 #endif // #if 0 @TODO - TEMP - SPIVRMs are no longer defined, pgp_vrm.h and vrm.c are not present
diff --git a/src/occ_405/amec/amec_slave_smh.c b/src/occ_405/amec/amec_slave_smh.c
index 1b7543f..07ad2ff 100755
--- a/src/occ_405/amec/amec_slave_smh.c
+++ b/src/occ_405/amec/amec_slave_smh.c
@@ -273,107 +273,6 @@ void amec_slv_check_apss_fail(void)
     g_amec->proc[0].pwr_votes.apss_pmax_clip_freq = l_pmax_rail_freq;
 }
 
-// Function Specification
-//
-// Name: amec_slv_pstate_uplift_check
-//
-// Description: This function checks if the Global Pstate table needs to be
-// modified with a voltage uplift. If an uplift has been requested, it will
-// proceed to update every entry of the table.
-//
-// End Function Specification
-void amec_slv_pstate_uplift_check(void)
-{
-    /*------------------------------------------------------------------------*/
-    /*  Local Variables                                                       */
-    /*------------------------------------------------------------------------*/
-    Pstate                      l_pmin = 0;
-    Pstate                      l_pmax = 0;
-    uint16_t                    i = 0;
-
-    /*------------------------------------------------------------------------*/
-    /*  Code                                                                  */
-    /*------------------------------------------------------------------------*/
-
-    // Check if a new uplift request for Vdd has been made
-    if ((G_sysConfigData.vdd_vid_delta != 0) ||
-        (G_sysConfigData.vcs_vid_delta != 0))
-    {
-        TRAC_INFO("Updating Global Pstate table with requested uplift values!");
-
-        // STEP 1:
-        // Prevent any Pstate changes by locking the PMC Rail so that
-        // Pmax_rail = Pmin_rail + 1
-        l_pmin = gpst_pmin(&G_global_pstate_table) + 1;
-
-        // Set the Pmax_rail register via OCI write
-        amec_oversub_pmax_clip(l_pmin);
-
-        // STEP 2:
-        // Update all entries of the Global Pstate table using uplift provided
-        for (i=0; i<G_global_pstate_table.entries; i++)
-        {
-            // Modify the fields associated with Vdd. Per HW procedure team,
-            // the evid_vdd_eff and max_reg_vdd should get decremented
-            G_global_pstate_table.pstate[i].fields.evid_vdd += G_sysConfigData.vdd_vid_delta;
-            G_global_pstate_table.pstate[i].fields.evid_vdd_eff -= G_sysConfigData.vdd_vid_delta;
-            G_global_pstate_table.pstate[i].fields.maxreg_vdd -= G_sysConfigData.vdd_vid_delta;
-
-            // Modify the fields associated with Vcs. Per HW procedure team,
-            // the evid_vcs_eff and max_reg_vcs should get decremented
-            G_global_pstate_table.pstate[i].fields.evid_vcs += G_sysConfigData.vcs_vid_delta;
-            G_global_pstate_table.pstate[i].fields.evid_vcs_eff -= G_sysConfigData.vcs_vid_delta;
-            G_global_pstate_table.pstate[i].fields.maxreg_vcs -= G_sysConfigData.vcs_vid_delta;
-
-            // Compute the ECC for this entry
-            G_global_pstate_table.pstate[i].fields.ecc =
-                gpstCheckByte(G_global_pstate_table.pstate[i].value);
-        }
-
-        // STEP 3:
-        // Release the lock on the PMC Rail from Step 1
-        l_pmax = gpst_pmax(&G_global_pstate_table);
-
-        // Set the Pmax_rail register via OCI write
-        amec_oversub_pmax_clip(l_pmax);
-
-        // STEP 4:
-        // In order to inform the HW about the new Global Pstate table, perform
-        // a single +1 Pstate jump
-        g_amec->pstate_foverride_enable = 1;
-        if (g_amec->proc[0].core_max_freq ==
-            G_sysConfigData.sys_mode_freq.table[OCC_MODE_TURBO])
-        {
-            // If we are at turbo frequency, then perform a single -1 Pstate
-            // jump instead
-            g_amec->pstate_foverride = g_amec->proc[0].core_max_freq -
-                (uint16_t)(G_global_pstate_table.frequency_step_khz / 1000);
-        }
-        else
-        {
-            g_amec->pstate_foverride = g_amec->proc[0].core_max_freq +
-            (uint16_t)(G_global_pstate_table.frequency_step_khz / 1000);
-        }
-
-        // After updating Global Pstate table, reset the delta to 0
-        G_sysConfigData.vdd_vid_delta = 0;
-        G_sysConfigData.vcs_vid_delta = 0;
-    }
-    else
-    {
-        // Check if we updated the Global Pstate table
-        if (g_amec->pstate_foverride_enable)
-        {
-            // STEP 5:
-            // Go back to the initial Pstate by disabling the override enable
-            // and maxing out the frequency request so it doesn't influence
-            // the final vote in the voting box
-            g_amec->pstate_foverride_enable = 0;
-            g_amec->pstate_foverride = 0xFFFF;
-        }
-    }
-}
-
 #endif // #if 0 @TODO - TEMP - Not ready yet in Phase 1
 
 // Function Specification
@@ -393,10 +292,6 @@ void amec_slv_common_tasks_pre(void)
 
   AMEC_DBG("\tAMEC Slave Pre-State Common\n");
 
-  // Check if we need to apply a voltage uplift to the Global Pstate table
-// @TODO - TEMP: Not Ready yet in Phase 1.
-//  amec_slv_pstate_uplift_check();
-
   // Update the FW Worst Case sensors every tick
   amec_update_fw_sensors();
 
diff --git a/src/occ_405/amec/amec_slave_smh.h b/src/occ_405/amec/amec_slave_smh.h
index 729a2ba..d511c63 100755
--- a/src/occ_405/amec/amec_slave_smh.h
+++ b/src/occ_405/amec/amec_slave_smh.h
@@ -70,7 +70,6 @@ extern bool G_apss_lower_pmax_rail;
 // Function Prototypes
 //*************************************************************************
 void amec_slv_check_apss_fail(void);
-void amec_slv_pstate_uplift_check(void);
 
 void amec_update_proc_core_group(uint8_t);