Bootloader file clean up.

Change-Id: I6037b4350cb2ce5911599c702de24464be9fc5d2
Reviewed-on: http://gfw160.aus.stglabs.ibm.com:8080/gerrit/14683
Reviewed-by: Stephan Broyles <sbroyles@us.ibm.com>
Tested-by: Stephan Broyles <sbroyles@us.ibm.com>

8 files changed, 346 insertions, 435 deletions

diff --git a/src/occBootLoader/Makefile b/src/occBootLoader/Makefile
index a9446b3..1e8c916 100755
--- a/src/occBootLoader/Makefile
+++ b/src/occBootLoader/Makefile
@@ -1,48 +1,48 @@
-#  @file Makefile
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
 #
-#  @brief bootloader Makefile
+# $Source: src/occBootLoader/Makefile$
 #
-
-#  @page ChangeLogs Change Logs
-#  @section Makefile
-#  @verbatim
+# OpenPOWER OnChipController Project
+#
+# Contributors Listed Below - COPYRIGHT 2011,2014
+# [+] Google Inc.
+# [+] International Business Machines Corp.
 #
 #
-# Change Log ******************************************************************
-# Flag     Defect/Feature  User        Date         Description
-# ------   --------------  ----------  ------------ -----------
-# @pb000                   pbavari     07/01/2011   Created
-# @pb001                   pbavari     07/16/2011   Changed to combine image
-#                                                   as separate command
-# @pb006                   pbavari     09/16/2011   Display size support
-# @pb004                   pbavari     09/20/2011   Added occ/ in include path
-# @pb007                   pbavari     09/29/2011   Added ppc405 in include path
-# @rc003                   rickylie    02/03/2012   Verify & Clean Up OCC Headers & Comments
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
 #
-# @endverbatim
+# http://www.apache.org/licenses/LICENSE-2.0
 #
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
 
-# >> gitprep
 ifndef ROOTPATH
 ROOTPATH = $(shell pwd)/../
 export OCCROOT = $(ROOTPATH)
 endif
-# << gitprep
 
 #*******************************************************************************
-# mk variable Declaration
+# Variables
 #*******************************************************************************
 OCC = ../occ
 BOOTLOADER = .
 SSX = ../ssx
+
 #*******************************************************************************
 # Includes
 #*******************************************************************************
 include bootfiles.mk
 include ../ssx/pgp/ssx.mk
 
-INCLUDES = -I. -I$(SSX)/ppc32 -I$(SSX)/pgp -I$(OCC)/incl -I$(OCC)/ \
-           -I$(SSX)/ppc405
+INCLUDES = -I. -I$(SSX)/ppc32 -I$(SSX)/pgp -I$(OCC)/incl -I$(OCC)/ -I$(SSX)/ppc405
 
 #*******************************************************************************
 # Flags
@@ -52,39 +52,30 @@ EXECUTABLE = bootloader
 imageHdrScript = imageHdrScript
 imageHdrScript_CC = gcc
 
-#D = -DSIMICS_MAGIC_PANIC=1 \
-     -DINITIALIZE_SIMICS_IO=1
-
 DEFS += $(D)
 
 #*******************************************************************************
-# Compilation 
+# Compilation
 #*******************************************************************************
 
 all: ${BOOTLOADER_OBJECTS} imageHdrScript
 	$(CPP) -P $(DEFS) < linkboot.cmd > linkscript
-	# >> gitprep
-	# Add missing link and objcopy flags
-	$(LD)  ${BOOTLOADER_OBJECTS} \
-		-Tlinkscript $(LDFLAGS) -zmuldefs -Map $(EXECUTABLE).map -melf32ppc --oformat=elf32-powerpc -Bstatic -o \
-		$(EXECUTABLE).out
+	$(LD)  ${BOOTLOADER_OBJECTS} -Tlinkscript $(LDFLAGS) -zmuldefs -Map $(EXECUTABLE).map -melf32ppc --oformat=elf32-powerpc -Bstatic -o $(EXECUTABLE).out
 	$(OBJCOPY) -I elf32-powerpc -O binary $(EXECUTABLE).out $(EXECUTABLE).bin
-	# << gitprep
 	$(OBJDUMP) -d $(EXECUTABLE).out > $(EXECUTABLE).dis
 	$(BOOTLOADER)/$(imageHdrScript) $(EXECUTABLE).bin t1
-	
+
 .PHONY : combineImage
 combineImage:
 	 	$(BOOTLOADER)/imageHdrScript $(EXECUTABLE).bin combineImage
 	 	$(BOOTLOADER)/imageHdrScript $(EXECUTABLE).out displaySize
 
 imageHdrScript: imageHdrScript.c
-	$(imageHdrScript_CC) $(LDFLAGS) -I$(BOOTLOADER) -I$(OCC)/incl -I$(OCC)/ \
-	     imageHdrScript.c -o $@
-	
+	$(imageHdrScript_CC) $(LDFLAGS) -I$(BOOTLOADER) -I$(OCC)/incl -I$(OCC)/ imageHdrScript.c -o $@
+
 #*******************************************************************************
 # Clean
 #*******************************************************************************
-clean: 
+clean:
 	rm -f *.o *.d *.out *.bin *.srec *.dis *.map linkscript imageHdrScript
 	rm -rf $(EXECUTABLE) $(IMAGE_FILE)
diff --git a/src/occBootLoader/bootInit.S b/src/occBootLoader/bootInit.S
index 9f4c104..d7fe632 100755
--- a/src/occBootLoader/bootInit.S
+++ b/src/occBootLoader/bootInit.S
@@ -1,84 +1,76 @@
-# *****************************************************************************
-# @file bootInit.S
-# @brief OCC boot loader initialization
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
 #
-
-# *****************************************************************************
+# $Source: src/occBootLoader/bootInit.S $
+#
+# OpenPOWER OnChipController Project
+#
+# Contributors Listed Below - COPYRIGHT 2011,2014
+# [+] Google Inc.
+# [+] International Business Machines Corp.
 #
-#       @page ChangeLogs Change Logs
-#       @section bootInit.S BOOTINIT.S
-#       @verbatim
 #
-#   Flag    Def/Fea    Userid    Date        Description
-#   ------- ---------- --------  ----------  ----------------------------------
-#   @pb000             pbavari   06/21/2011  Created
-#   @pb007             pbavari   09/29/2011  Added trap if reset was due to
-#                                            watchdog timer
-#   @rc003             rickylie  02/03/2012  Verify & Clean Up OCC Headers & Comments
-#   @th00c             thallet   03/02/2012  DCCR was getting loaded with incorret imm
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
 #
-#  @endverbatim
+# http://www.apache.org/licenses/LICENSE-2.0
 #
-# *****************************************************************************
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
 
-/*****************************************************************************/
-// Includes
-/*****************************************************************************/
+#*****************************************************************************/
+# Includes
+#*****************************************************************************/
 #include "bootMain.h"
 #include "ppc32_asm.h"
 #include "ppc405_spr.h"
-/*****************************************************************************/
 
-/*****************************************************************************/
-// Functions
-/*****************************************************************************/
+#*****************************************************************************/
+# Functions
+#*****************************************************************************/
+
 # Function Specification ******************************************************
 #
 #  Name: boot_low_level_init
 #
 #  Description: Low level boot initialization
 #
-#  Flow: 06/22/2011     FN= ??
-#
 # End Function Specification **************************************************
-
 .global_function __boot_low_level_init
 
 __boot_low_level_init:
 
-
-#enable machine check exception
+# enable machine check exception
 # initialize exception vector prefix to zero
 # enable machine check (19th bit)
-
 li      %r3, 0
 mtevpr  %r3
 _liwa   %r4, MACHINE_CHECK_ENABLE
 mtmsr   %r4
 
-// Check if TSR[WSR] indicates that reset was due to watchdog,
-// then initialize external debug event and trap(halt). Otherwise
-// continue normally. Setting up external debug event will set FIR bits on halt
+# Check if TSR[WSR] indicates that reset was due to watchdog,
+# then initialize external debug event and trap(halt). Otherwise
+# continue normally. Setting up external debug event will set FIR bits on halt
 mftsr   %r3
-_liwa   %r4, ( TSR_WRS_CHIP | TSR_WRS_CORE | TSR_WRS_SYSTEM )
+_liwa   %r4, (TSR_WRS_CHIP | TSR_WRS_CORE | TSR_WRS_SYSTEM)
 AND     %r5, %r3, %r4
 li      %r4, 0
 cmp     0, 0, %r4, %r5
 beq     skip_wd_reset_trap
 
-// Initialize external debug event before doing trap
-_liwa   %r3, (DBCR0_EDM | DBCR0_TDE | DBCR0_FT )
+# Initialize external debug event before doing trap
+_liwa   %r3, (DBCR0_EDM | DBCR0_TDE | DBCR0_FT)
 mtdbcr0 %r3
 tw 31,0,0
 
 skip_wd_reset_trap:
-
 # enable write back data cache and instruction cache
-# enable write back data for 0x80000000. Note:write-back=0,write-through=1
-# Data cache enabled for 0x80000000. Bit 16 going left-right. 1=enable,0=disable
-# enable instruction cache for 0x80000000. Bit 16 going left-right.
-#      1= enable, 0 = disable
-
 li       %r3, 0
 mtdcwr   %r3
 _liw     %r3, DATA_CACHE_BLOCK_ENABLE
@@ -86,49 +78,32 @@ mtdccr   %r3
 mticcr   %r3
 
 dcache_invalidate:
-	## We loop through addresses 0 ... (DCACHE_SIZE / DCACHE_WAYS) - 1
-	## invalidating the D-Cache.  The dccci instruction on the 405
-	## invalidates both ways.  Added: @th00c
-
-	li	%r3, 0
-	_liwa	%r4, (DATA_CACHE_LINES / 2)
-	mtctr	%r4
-
-1:	
-	dccci	%r0, %r3
-	addi	%r3, %r3, CACHE_LINE_SIZE
-	bdnz	1b
-	
-	sync
+# We loop through addresses 0 ... (DCACHE_SIZE / DCACHE_WAYS) - 1
+# invalidating the D-Cache.  The dccci instruction on the 405
+# invalidates both ways.
+li    %r3, 0
+_liwa    %r4, (DATA_CACHE_LINES / 2)
+mtctr    %r4
+
+1:
+dccci    %r0, %r3
+addi    %r3, %r3, CACHE_LINE_SIZE
+bdnz    1b
+sync
 
 # fill in 16K with zero for the data cache
 # set counter to loop for number of data cache lines
-
 _liw    %r3, 0
 _liwa   %r5, DATA_CACHE_BLOCK_ADDR
 _liwa   %r4, DATA_CACHE_LINES
 mtctr   %r4
 
 dcbz_loop:
+dcbz    %r5, %r3
+addi    %r3, %r3, CACHE_LINE_SIZE
+bdnz    dcbz_loop
 
-    dcbz    %r5, %r3
-    addi    %r3, %r3, CACHE_LINE_SIZE
-    bdnz    dcbz_loop
-
-
-# calculate writable data section start address
-# start_addr + readonly_size = writable data section address
-# load start address into r5
-# load readonly size address into r4
-# add contents of r5 and r4 and put into r3
-# r3 now has source address
-# load address of size of the data to be copied into r4
-# load destination address into r5
-# store number of word trasfers in r4
-# set counter to r4 content
-# NOTE: (-4) for the source and destination address is done because
-#       in the loop 4 is added to get to the correct address.
-
+# write in initialized writeable data if length is non-zero
 _liw    %r5, (__START_ADDR__ - 4)
 _liw    %r4, __READ_ONLY_DATA_LEN__
 add     %r3, %r5, %r4
@@ -136,99 +111,65 @@ _liw    %r4, __WRITEABLE_DATA_LEN__
 _liw    %r5, (__WRITEABLE_DATA_ADDR__ - 4)
 _liw    %r6, 2
 srw     %r4, %r4, %r6
-
-# Compare r4 and r6. If equal then skip_loop. Else execute copy_loop
 _liw    %r6, 0
 cmp     0, 0, %r4, %r6
 beq     skip_loop
 mtctr   %r4
-copy_loop:
 
-    lwzu    %r4, 4(%r3)
-    stwu    %r4, 4(%r5)
-    bdnz    copy_loop
+copy_loop:
+lwzu    %r4, 4(%r3)
+stwu    %r4, 4(%r5)
+bdnz    copy_loop
 
 skip_loop:
-
-# set up EABI constant registers r2,r13
-
+# set up EABI constant registers r2, r13
 _liw    %r2, _SDA2_BASE_
 _liw    %r13, _SDA_BASE_
 
-# set up stack pointer - register r1
-
-_liwa    %r1, STACK_POINTER_ADDR
+# set up stack pointer register r1
+_liwa   %r1, STACK_POINTER_ADDR
 
 # jump to main
-
 b main
-
-# function clean up and return
-
 .epilogue  __boot_low_level_init
 
-# vector section
-
+# vector section, put traps on sections after 0000
 .section .vectors_0000, "a", @progbits
-    .global __vectors_0000
+.global __vectors_0000
 
 __vectors_0000:
-
-
-    .section .vectors_0100, "ax", @progbits
-    .global __vectors_0100
+.section .vectors_0100, "ax", @progbits
+.global __vectors_0100
 
 __vectors_0100:
-
-# Trap instruction
 tw 31,0,0
-
-    .section .vectors_0200, "ax", @progbits
-    .global __vectors_0200
+.section .vectors_0200, "ax", @progbits
+.global __vectors_0200
 
 __vectors_0200:
-
-# Trap instruction
 tw 31,0,0
-
-    .section .vectors_0300, "ax", @progbits
-    .global __vectors_0300
+.section .vectors_0300, "ax", @progbits
+.global __vectors_0300
 
 __vectors_0300:
-
-# Trap instruction
 tw 31,0,0
-
-    .section .vectors_0400, "ax", @progbits
-    .global __vectors_0400
+.section .vectors_0400, "ax", @progbits
+.global __vectors_0400
 
 __vectors_0400:
-
-# Trap instruction
 tw 31,0,0
-
-    .section .vectors_0500, "ax", @progbits
-    .global __vectors_0500
+.section .vectors_0500, "ax", @progbits
+.global __vectors_0500
 
 __vectors_0500:
-
-# Trap instruction
 tw 31,0,0
-
-    .section .vectors_0600, "ax", @progbits
-    .global __vectors_0600
+.section .vectors_0600, "ax", @progbits
+.global __vectors_0600
 
 __vectors_0600:
-
-# Trap instruction
 tw 31,0,0
-
-
-    .section .vectors_0700, "ax", @progbits
-    .global __vectors_0700
+.section .vectors_0700, "ax", @progbits
+.global __vectors_0700
 
 __vectors_0700:
-
-# Trap instruction
 tw 31,0,0
-
diff --git a/src/occBootLoader/bootMain.c b/src/occBootLoader/bootMain.c
index 10df75f..64333c8 100755
--- a/src/occBootLoader/bootMain.c
+++ b/src/occBootLoader/bootMain.c
@@ -1,25 +1,25 @@
-/******************************************************************************
-// @file bootMain.c
-// @brief OCC boot loader main
-*/
-/******************************************************************************
- *
- *       @page ChangeLogs Change Logs
- *       @section bootMain.c BOOTMAIN.C
- *       @verbatim
- *
- *   Flag    Def/Fea    Userid    Date        Description
- *   ------- ---------- --------  ----------  ----------------------------------
- *   @pb000             pbavari   06/22/2011  Created
- *   @dw000             dwoodham  12/12/2011  Update call to IMAGE_HEADER macro
- *   @rc003             rickylie  02/03/2012  Verify & Clean Up OCC Headers & Comments
- *   @th00c             thallet   03/02/2012  VPO Changes to 405 Caching
- *   @sb000  905048     sbroyles  10/28/2013  Add tags for code cleanup,
- *                                            see RTC task 73327.
-*    @sb001  906184     sbroyles  11/11/2013  Resolve fix tags
- *  @endverbatim
- *
- *///*************************************************************************/
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/occBootLoader/bootMain.c $                                */
+/*                                                                        */
+/* OpenPOWER OnChipController Project                                     */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2011,2014              */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
 
 //*************************************************************************
 // Includes
@@ -36,9 +36,8 @@ extern void __boot_low_level_init;
 //*************************************************************************
 // Image header
 //*************************************************************************
-//@dw001c - added arg: idNum = ID_NUM_INVALID
-IMAGE_HEADER (G_bootImageHdr,__boot_low_level_init,BOOT_LOADER_ID,
-              ID_NUM_INVALID);
+IMAGE_HEADER(G_bootImageHdr,__boot_low_level_init,BOOT_LOADER_ID,
+             ID_NUM_INVALID);
 
 //*************************************************************************
 // Macros
@@ -61,8 +60,8 @@ IMAGE_HEADER (G_bootImageHdr,__boot_low_level_init,BOOT_LOADER_ID,
 //*************************************************************************
 //Forward declaration
 uint32_t boot_test_sram();
-uint32_t boot_load_image(const imageHdr_t * i_hdrAddr);
-uint32_t calChecksum(const uint32_t i_startAddr,const uint32_t i_sz );
+uint32_t boot_load_image(const imageHdr_t *i_hdrAddr);
+uint32_t calChecksum(const uint32_t i_startAddr ,const uint32_t i_sz);
 
 //*************************************************************************
 // Functions
@@ -73,9 +72,7 @@ uint32_t calChecksum(const uint32_t i_startAddr,const uint32_t i_sz );
 //  Name: boot_main
 //
 //  Description: boot main will test SRAM, copy main application image from
-//  main memory to SRAM, validate checksum and calls ssx_boot.
-//
-//  Flow: 06/22/2011     FN= boot_main
+//  main memory to SRAM, validate checksum and call ssx_boot.
 //
 // End Function Specification
 void main()
@@ -85,30 +82,30 @@ void main()
     WRITE_TO_SPRG0(BOOT_TEST_SRAM_CHKPOINT);
 
 #ifndef VPO
-    // @th00c - This is ifdef'd out b/c it takes too long to run in VPO
+    // This is ifdef'd out b/c it takes too long to run in VPO
     // Test SRAM
     l_rc = boot_test_sram();
 #endif
 
     // If failed to test SRAM, write failed return code to SPRG1 and halt
-    if( 0 != l_rc )
+    if(0 != l_rc)
     {
         WRITE_TO_SPRG1_AND_HALT(l_rc);
     }
 
     // set imageHdr_t pointer to point to boot image header to get to boot
     // image size. This way we can get to main application image header.
-    imageHdr_t *l_hdrPtr = (imageHdr_t*)(G_bootImageHdr.start_addr +
-                                         G_bootImageHdr.image_size );
+    imageHdr_t *l_hdrPtr = (imageHdr_t *)(G_bootImageHdr.start_addr +
+                                          G_bootImageHdr.image_size);
 
     // set checkpoint to boot load main application image to SRAM
-    WRITE_TO_SPRG0(BOOT_LOAD_IMAGE_CHKPOINT );
+    WRITE_TO_SPRG0(BOOT_LOAD_IMAGE_CHKPOINT);
 
     // Load main application image to SRAM including main application header
     l_rc = boot_load_image(l_hdrPtr);
 
     // If failed to load image, write failed return code to SPRG1 and halt
-    if( 0 != l_rc )
+    if(0 != l_rc)
     {
         WRITE_TO_SPRG1_AND_HALT(l_rc);
     }
@@ -121,7 +118,7 @@ void main()
                                       l_hdrPtr->image_size);
 
     // If checksum does not match, store bad checksum into SPRG1 and halt
-    if( l_checksum != l_hdrPtr->checksum)
+    if(l_checksum != l_hdrPtr->checksum)
     {
         WRITE_TO_SPRG1_AND_HALT(l_checksum);
     }
@@ -129,29 +126,18 @@ void main()
     // set checkpoint to get nest frequency
     WRITE_TO_SPRG0(BOOT_GET_NEST_FREQ_CHKPOINT);
 
-    // @sb001 Remove this local.
-    //uint32_t l_nestFreq = 2400000;
-
     // set checkpoint to call to SSX_BOOT
     WRITE_TO_SPRG0(BOOT_SSX_BOOT_CALL_CHKPOINT);
 
-    // Invalidate Data Cache before calling __ssx_boot()
-    //dcache_invalidate_all();   // @th00c
-
     // create function pointer pointing to main application header entry point
-    // address. This is similar to jump/branch to address in assembly
-
-    // @sb001 Don't pass l_nestFreq anymore, ssx boot code isn't reading it.
-    //void (*execute_ssx_boot)(uint32_t) = (void (*)(uint32_t)) l_hdrPtr->ep_addr;
-    //(*execute_ssx_boot)(l_nestFreq);
-    void (*execute_ssx_boot)(void) = (void (*)(void)) l_hdrPtr->ep_addr;
+    // address.
+    void (*execute_ssx_boot)(void) = (void (*)(void))l_hdrPtr->ep_addr;
     (*execute_ssx_boot)();
 
     // set checkpoint to return from ssx_boot. This should never happen so
     // halt at this point.
     WRITE_TO_SPRG0(BOOT_SSX_RETURNED_CHKPOINT);
     WRITE_TO_SPRG1_AND_HALT(l_hdrPtr->ep_addr);
-
 }
 
 // Function Specification
@@ -162,24 +148,21 @@ void main()
 //               bytes. Skip checksum field in the imageHdr_t while calculating
 //               checksum
 //
-//  Flow: None     FN= None
-//
 // End Function Specification
-
-uint32_t calChecksum(const uint32_t i_startAddr,const uint32_t i_sz )
+uint32_t calChecksum(const uint32_t i_startAddr, const uint32_t i_sz)
 {
     uint32_t l_checksum = 0;
     uint32_t l_counter = 0;
-    uint8_t * l_srcPtr = (uint8_t *) (i_startAddr);
+    uint8_t *l_srcPtr = (uint8_t *)(i_startAddr);
 
-    while (l_counter < i_sz )
+    while(l_counter < i_sz)
     {
         l_checksum += (*(l_srcPtr + l_counter));
         l_counter = l_counter + 1;
-        if( l_counter == (uint32_t)(offsetof(imageHdr_t,checksum)))
+        if(l_counter == (uint32_t)(offsetof(imageHdr_t,checksum)))
         {
-            l_counter =  ((uint32_t)(offsetof(imageHdr_t,checksum)) +
-                         sizeof(G_bootImageHdr.checksum));
+            l_counter = ((uint32_t)(offsetof(imageHdr_t,checksum)) +
+                        sizeof(G_bootImageHdr.checksum));
         }
     }
 
@@ -193,12 +176,8 @@ uint32_t calChecksum(const uint32_t i_startAddr,const uint32_t i_sz )
 //  Description: This function copies main application image from main memory
 //               to SRAM
 //
-//
-//  Flow: 06/22/2011     FN= boot_load_image
-//
 // End Function Specification
-
-uint32_t boot_load_image(const imageHdr_t * i_hdrAddr )
+uint32_t boot_load_image(const imageHdr_t *i_hdrAddr)
 {
     uint32_t l_rc = 0x0;
     uint32_t l_mainAppDestRang = (i_hdrAddr->start_addr) +
@@ -206,13 +185,13 @@ uint32_t boot_load_image(const imageHdr_t * i_hdrAddr )
 
     // Make sure main application destination rang address falls within SRAM
     // range.
-    if(  ( l_mainAppDestRang < SRAM_START_ADDRESS) ||
-         (l_mainAppDestRang > SRAM_END_ADDRESS ))
+    if((l_mainAppDestRang < SRAM_START_ADDRESS) ||
+       (l_mainAppDestRang > SRAM_END_ADDRESS))
     {
         // Return destination rang address if address is out of range and
         // address is not zero. If address is zero, then return eye-catcher
         // address.
-        if( l_mainAppDestRang != 0 )
+        if(l_mainAppDestRang != 0)
         {
             l_rc = l_mainAppDestRang;
         }
@@ -221,14 +200,14 @@ uint32_t boot_load_image(const imageHdr_t * i_hdrAddr )
             l_rc = EYE_CATCHER_ADDRESS;
         }
     }
-    //Make sure main application start address falls within SRAM range
-    else if ((i_hdrAddr->start_addr < SRAM_START_ADDRESS) ||
-             (i_hdrAddr->start_addr > SRAM_END_ADDRESS))
+    // Make sure main application start address falls within SRAM range
+    else if((i_hdrAddr->start_addr < SRAM_START_ADDRESS) ||
+            (i_hdrAddr->start_addr > SRAM_END_ADDRESS))
     {
         // Return start address if address is out of range and
         // address is not zero. If address is zero, then return eye-catcher
         // address.
-        if( i_hdrAddr->start_addr != 0 )
+        if(i_hdrAddr->start_addr != 0)
         {
             l_rc = i_hdrAddr->start_addr;
         }
@@ -244,11 +223,11 @@ uint32_t boot_load_image(const imageHdr_t * i_hdrAddr )
         // Now copy main application header specified
         // size of data from main memory to main application header specified
         // start address.
-        uint8_t * l_srcPtr = (uint8_t *) (i_hdrAddr);
-        uint8_t * l_destPtr = (uint8_t *) (i_hdrAddr->start_addr);
+        uint8_t *l_srcPtr = (uint8_t *)(i_hdrAddr);
+        uint8_t *l_destPtr = (uint8_t *)(i_hdrAddr->start_addr);
         uint32_t l_numWords = i_hdrAddr->image_size;
 
-        while (l_numWords != 0 )
+        while(l_numWords != 0)
         {
             *l_destPtr = *l_srcPtr;
             l_destPtr++;
@@ -269,8 +248,6 @@ uint32_t boot_load_image(const imageHdr_t * i_hdrAddr )
 //               verifying it back through read
 //
 //
-//  Flow: 06/22/2011     FN= boot_test_sram
-//
 // End Function Specification
 
 uint32_t boot_test_sram()
@@ -278,23 +255,23 @@ uint32_t boot_test_sram()
     uint32_t l_rc = 0;
 
     // Point start to SRAM start address
-    uint32_t * l_startPtr = (uint32_t *) SRAM_TEST_START_ADDRESS;
+    uint32_t *l_startPtr = (uint32_t *)SRAM_TEST_START_ADDRESS;
 
     // Copy bit pattern from start until SRAM end address
-    while( (uint32_t)l_startPtr < SRAM_TEST_END_ADDRESS )
+    while((uint32_t)l_startPtr < SRAM_TEST_END_ADDRESS)
     {
         *l_startPtr = SRAM_TEST_BIT_PATTERN;
         l_startPtr++;
     }
 
     // Reset start pointer to point to SRAM start Address
-    l_startPtr = (uint32_t *) SRAM_TEST_START_ADDRESS;
+    l_startPtr = (uint32_t *)SRAM_TEST_START_ADDRESS;
 
     //Read and verify bit pattern that was written. If pattern does not match,
     // return address that failed to match the pattern.
-    while( (uint32_t)l_startPtr < SRAM_TEST_END_ADDRESS )
+    while((uint32_t)l_startPtr < SRAM_TEST_END_ADDRESS)
     {
-        if( (*l_startPtr) != SRAM_TEST_BIT_PATTERN)
+        if((*l_startPtr) != SRAM_TEST_BIT_PATTERN)
         {
              l_rc = (uint32_t)l_startPtr;
              break;
@@ -305,4 +282,3 @@ uint32_t boot_test_sram()
     return l_rc;
 }
 
-
diff --git a/src/occBootLoader/bootMain.h b/src/occBootLoader/bootMain.h
index 0d836c5..2c7512b 100755
--- a/src/occBootLoader/bootMain.h
+++ b/src/occBootLoader/bootMain.h
@@ -1,25 +1,26 @@
-/******************************************************************************
-// @file bootMain.h
-// @brief OCC boot loader main defines
-*/
-/******************************************************************************
- *
- *       @page ChangeLogs Change Logs
- *       @section bootMain.h BOOTMAIN.H
- *       @verbatim
- *
- *   Flag    Def/Fea    Userid    Date        Description
- *   ------- ---------- --------  ----------  ----------------------------------
- *   @pb000             pbavari   06/22/2011  Created
- *   @rc003             rickylie  02/03/2012  Verify & Clean Up OCC Headers & Comments
- *   @ai007             ailutsar  12/10/2012  Change OCC Image Header to reserve 64 bytes 
- *                                            for SRAM Repair instead of 16
- *   @th030             thallet   02/03/2013  Need to reserve last 1kB for PORE-SLW
- *
- *  @endverbatim
- *
- *///*************************************************************************/
- 
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/occBootLoader/bootMain.h $                                */
+/*                                                                        */
+/* OpenPOWER OnChipController Project                                     */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2011,2014              */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+
 #ifndef _bootMain_h
 #define _bootMain_h
 
@@ -27,7 +28,7 @@
 // Includes
 //*************************************************************************
 #ifndef __ASSEMBLER__
-#include <common_types.h>        // defines imageHdr_t and other types
+#include <common_types.h> // defines imageHdr_t and other types
 #endif  /* __ASSEMBLER__ */
 
 //*************************************************************************
@@ -49,38 +50,38 @@
 #define DATA_CACHE_LINES            (DATA_CACHE_SIZE/CACHE_LINE_SIZE)
 
 // Data cache address + 8K
-#define STACK_POINTER_ADDR          (  DATA_CACHE_BLOCK_ADDR + 0x2000)
+#define STACK_POINTER_ADDR          (DATA_CACHE_BLOCK_ADDR + 0x2000)
 
 #ifndef __ASSEMBLER__
 
 typedef enum CHKPOINT
 {
-    BOOT_TEST_SRAM_CHKPOINT = 0x00000001,
-    BOOT_LOAD_IMAGE_CHKPOINT = 0x00000002,
-    BOOT_CALCULTE_CHKSUM_CHKPOINT= 0x00000003,
-    BOOT_GET_NEST_FREQ_CHKPOINT = 0x00000004,
-    BOOT_SSX_BOOT_CALL_CHKPOINT = 0x00000005,
-    BOOT_SSX_RETURNED_CHKPOINT = 0x00000006
+    BOOT_TEST_SRAM_CHKPOINT =       0x00000001,
+    BOOT_LOAD_IMAGE_CHKPOINT =      0x00000002,
+    BOOT_CALCULTE_CHKSUM_CHKPOINT=  0x00000003,
+    BOOT_GET_NEST_FREQ_CHKPOINT =   0x00000004,
+    BOOT_SSX_BOOT_CALL_CHKPOINT =   0x00000005,
+    BOOT_SSX_RETURNED_CHKPOINT =    0x00000006
 }CHKPOINT;
 
 #endif  /* __ASSEMBLER__ */
 
-#define SRAM_TEST_START_ADDRESS         0xFFF80040  // @ai007c
-#define SRAM_START_ADDRESS              0xFFF80000
-#define SRAM_TEST_END_ADDRESS           0xFFFFFBFF  // @th030c
-#define SRAM_END_ADDRESS                0xFFFFFFFF
-#define SRAM_TEST_BIT_PATTERN           0xA5A5A5A5
-#define EYE_CATCHER_ADDRESS             0x1234ABCD
+#define SRAM_TEST_START_ADDRESS     0xFFF80040
+#define SRAM_START_ADDRESS          0xFFF80000
+#define SRAM_TEST_END_ADDRESS       0xFFFFFBFF
+#define SRAM_END_ADDRESS            0xFFFFFFFF
+#define SRAM_TEST_BIT_PATTERN       0xA5A5A5A5
+#define EYE_CATCHER_ADDRESS         0x1234ABCD
 
-#define BOOT_LOADER_ID                  "OCC Boot Image\0"
+#define BOOT_LOADER_ID              "OCC Boot Image\0"
 
 // Define to write val to SPRG0 register
 #define WRITE_TO_SPRG0(val) \
     ({__asm__ __volatile__ ("mtsprg0 %0;" ::"r"(val));})
 
 #define WRITE_TO_SPRG1_AND_HALT(rc) \
-    ({__asm__ __volatile__ ( "mtsprg1 %0;" "tw 31,0,0;": : "r" (rc));})
-	
+    ({__asm__ __volatile__ ("mtsprg1 %0;" "tw 31,0,0;": : "r" (rc));})
+
 //*************************************************************************
 // Structures
 //*************************************************************************
@@ -99,4 +100,3 @@ typedef enum CHKPOINT
 
 #endif // _bootMain_h
 
-
diff --git a/src/occBootLoader/bootfiles.mk b/src/occBootLoader/bootfiles.mk
index f7b2cbc..8eeca95 100755
--- a/src/occBootLoader/bootfiles.mk
+++ b/src/occBootLoader/bootfiles.mk
@@ -1,28 +1,34 @@
-#  @file libofiles.mk
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
 #
-#  @brief mk for libssx.a object files
+# $Source: src/occBootLoader/bootfiles.mk$
 #
-#  @page ChangeLogs Change Logs
-#  @section ofiles.mk
-#  @verbatim
+# OpenPOWER OnChipController Project
 #
+# Contributors Listed Below - COPYRIGHT 2011,2014
+# [+] Google Inc.
+# [+] International Business Machines Corp.
 #
-# Change Log ******************************************************************
-# Flag     Defect/Feature  User        Date         Description
-# ------   --------------  ----------  ------------ -----------
-# @pb00E                   pbavari     03/28/2012   Makefile ODE support
-# @rc004    882410         rickylie    05/10/2013   Pin OCC Firmware Level to an Address in Lid
 #
-# @endverbatim
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
 #
-##########################################################################
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
+
+#*******************************************************************************
 # INCLUDES
-##########################################################################
+#*******************************************************************************
 C-SOURCES = bootMain.c ../occ/occbuildname.c
-S-SOURCES = bootInit.S  ../ssx/ppc32/savegpr.S
+S-SOURCES = bootInit.S ../ssx/ppc32/savegpr.S
 
 BOOTLOADER_OBJECTS = $(C-SOURCES:.c=.o) $(S-SOURCES:.S=.o)
 
-			
-			
-
diff --git a/src/occBootLoader/imageHdrScript.c b/src/occBootLoader/imageHdrScript.c
index 77bb134..e32d427 100755
--- a/src/occBootLoader/imageHdrScript.c
+++ b/src/occBootLoader/imageHdrScript.c
@@ -1,29 +1,25 @@
-/******************************************************************************
-// @file imageHdrScript.c
-// @brief Helper script to fix image header fields and other image related
-//        support
-*/
-/******************************************************************************
- *
- *       @page ChangeLogs Change Logs
- *       @section imageHdrScript.c IMAGEHDRSCRIPT.C
- *       @verbatim
- *
- *   Flag    Def/Fea    Userid    Date        Description
- *   ------- ---------- --------  ----------  ----------------------------------
- *   @pb000             pbavari   06/28/2011  Created
- *   @pb001             pbavari   07/21/2011  Changed the way image is being
- *                                            combined to support applet images
- *   @pb006             pbavari   09/16/2011  Display object size support
- *   @pb00A             pbavari   11/17/2011  Added check for 128 bytes
- *                                            alignment for image size.
- *   @rc003             rickylie  02/03/2012  Verify & Clean Up OCC Headers & Comments
- *   @pb010  D856284    pbavari   10/05/2012  Fix displaySize option
- *   @ai004             ailutsar  11/06/2012  Improvement for imageHdrScript help text
- *
- *  @endverbatim
- *
- *///*************************************************************************/
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/occBootLoader/imageHdrScript.c $                          */
+/*                                                                        */
+/* OpenPOWER OnChipController Project                                     */
+/*                                                                        */
+/* COPYRIGHT International Business Machines Corp. 2011,2014              */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
 
 //*************************************************************************
 // Includes
@@ -49,34 +45,28 @@
 #define CHECKSUM_FIELD_OFFSET   offsetof(imageHdr_t, checksum)
 #define CHECKSUM_FIELD_LEN      4
 #define IMAGE_SZ_FIELD_OFFSET   offsetof(imageHdr_t, image_size)
-#define IMAGE_SZ_FIELD_LEN       4
+#define IMAGE_SZ_FIELD_LEN      4
 #define FAILURE_RC              -1
-#define SUCCESS_RC               0
-#define EP_BRANCH_INST_LEN       4
+#define SUCCESS_RC              0
+#define EP_BRANCH_INST_LEN      4
 #define EP_BRANCH_INST_OFFSET   offsetof(imageHdr_t, ep_branch_inst)
 #define ADDRESS_OFFSET          offsetof(imageHdr_t, ep_addr)
-#define ADDRESS_LEN              4
+#define ADDRESS_LEN             4
 #define VERSION_OFFSET          offsetof(imageHdr_t, version)
-#define VERSION_LEN              4
-#define ID_STR_OFFSET            offsetof(imageHdr_t, image_id_str)
+#define VERSION_LEN             4
+#define ID_STR_OFFSET           offsetof(imageHdr_t, image_id_str)
 #define ID_STR_LEN              IMAGE_ID_STR_SZ
 #define ADDRESS_MASK            0x03FFFFFC
 #define BRANCH_MASK             0x48000002
 #define DUMP_HDR_STR            "dumpHdr"
 #define COMBINE_IMAGE_STR       "combineImage"
-
-// >> gitprep
 #define FILE_TO_WRITE_ODE       "/obj/ppc/occc/405/image.bin"
 #define FILE_TO_WRITE_GNU       "image.bin"
-// << gitprep
-
-//@pb006a - start
 #define DISPLAY_SIZE            "displaySize"
 #define READELF_CMD             "readelf -S "
 #define PIPE_CMD                " > elfdata "
 #define ELF_FILE                "elfdata"
 #define ELF_FILE_REMOVE_CMD     "rm elfdata"
-//@pb006a - end
 
 //*************************************************************************
 // Structures
@@ -94,15 +84,12 @@
 // Functions
 //*************************************************************************
 
-//@pb006a
 // Function Specification
 //
 // Name: displaySize
 //
 // Description: Display size of the object file
 //
-// Flow:            FN=None
-// 
 // End Function Specification
 int displaySize(char * i_file)
 {
@@ -184,7 +171,6 @@ int displaySize(char * i_file)
                 {
                     break;
                 }
-                //@pb010a - start
                 l_str = NULL;
                 // We need to parse 2 different options:
                 // 1) [ X] and 2) [XX] Where X is number.
@@ -209,7 +195,6 @@ int displaySize(char * i_file)
                            l_addr,(int)l_size,l_size);
                     l_totalSz += l_size;
                 }
-                //@pb010a - end
             }
         } // end while loop
         printf("===========================================================\n");
@@ -244,10 +229,8 @@ int displaySize(char * i_file)
 //
 // Name: combineImage
 //
-// Description: Append input image to $sb/src/image.bin
+// Description: Append input image to image.bin
 //
-// Flow:            FN=None
-// 
 // End Function Specification
 int combineImage(char * i_file1)
 {
@@ -256,9 +239,7 @@ int combineImage(char * i_file1)
     FILE * l_file = NULL;
     int l_rc = SUCCESS_RC;
     unsigned long int l_size = 0;
-    // >> gitprep
     bool l_odeBuild = TRUE;
-    // << gitprep
 
     do
     {
@@ -266,13 +247,10 @@ int combineImage(char * i_file1)
         if( l_sbPath != NULL)
         {
             l_size = strlen(l_sbPath);
-            // >> gitprep
             l_size += strlen(FILE_TO_WRITE_ODE);
-            // << gitprep
         }
         else
         {
-            // >> gitprep
             l_sbPath = getenv("OCCROOT");
             if(l_sbPath != NULL)
             {
@@ -286,12 +264,10 @@ int combineImage(char * i_file1)
                 l_rc = FAILURE_RC;
                 break;
             }
-            // << gitprep
         }
         char l_fileToWrite[l_size+1];
         strncpy(l_fileToWrite,l_sbPath,strlen(l_sbPath));
-        
-        // >> gitprep
+
         if ( TRUE == l_odeBuild )
         {
             strncpy(&l_fileToWrite[strlen(l_sbPath)],FILE_TO_WRITE_ODE,strlen(FILE_TO_WRITE_ODE));
@@ -300,11 +276,8 @@ int combineImage(char * i_file1)
         {
             strncpy(&l_fileToWrite[strlen(l_sbPath)],FILE_TO_WRITE_GNU,strlen(FILE_TO_WRITE_GNU));
         }
-        // << gitprep
         l_fileToWrite[l_size] = '\0';
-        // >> gitprep
         printf("l_fileToWrite: %s\t\tl_sbPath: %s\n", l_fileToWrite, l_sbPath);
-        // << gitprep
         // Open the file1
         l_file1 = fopen(i_file1, "r");
 
@@ -405,8 +378,6 @@ int combineImage(char * i_file1)
 //
 // Description: Dump image header
 //
-// Flow:            FN=None
-// 
 // End Function Specification
 int dumpHdr(char * i_fileStr)
 {
@@ -516,8 +487,6 @@ int dumpHdr(char * i_fileStr)
 //
 // Description: calculate image checksum
 //
-// Flow:            FN=None
-// 
 // End Function Specification
 unsigned long int calImageChecksum(FILE * i_filePtr)
 {
@@ -542,9 +511,7 @@ unsigned long int calImageChecksum(FILE * i_filePtr)
         l_val = fgetc(i_filePtr);
     }
 
-    // >> gitprep
     fprintf(stdout,"Checksum: 0x%08X\t\tSize: 0x%08X\n", l_checksum, l_counter);
-    // << gitprep
     return l_checksum;
 }
 
@@ -555,8 +522,6 @@ unsigned long int calImageChecksum(FILE * i_filePtr)
 //
 // Description: Write given data to file at given offset
 //
-// Flow:            FN=None
-// 
 // End Function Specification
 int write(FILE * i_filePtr,
           const void * i_dataPtr,
@@ -595,17 +560,12 @@ int write(FILE * i_filePtr,
 //
 // Description: script usage
 //
-// Flow:            FN=None
-// 
 // End Function Specification
 void printHelp()
 {
-    // @ai004M
     printf("Script Usage: imageHdrScript [FILE] [OPTIONS]\n\n");
-    
     printf("This OCC Image Header Script is used for handling different image header\n");
     printf("fields and combining different OCC images into single image.\n");
-    // >> gitprep
     if ( NULL != getenv("SANDBOXBASE") )
     {
         printf("The path to target image is $SANDBOXBASE%s\n\n", FILE_TO_WRITE_ODE);
@@ -614,13 +574,12 @@ void printHelp()
     {
         printf("The path to target image is $OCCROOT%s\n\n", FILE_TO_WRITE_GNU);
     }
-    // << gitprep
     printf("Option for ELF executable file (file type: *.out):\n");
     printf("    displaySize     check section sizes in input file\n");
     printf("Options for binary image file (file type: *.bin):\n");
     printf("    combineImage    append input image to the target image\n");
     printf("    dumpHdr         dump values of each header field in input image\n\n");
-    
+
     printf("If the option string is not equal to \"combineImage\", \"displaySize\", or\n");
     printf("\"dumpHdr\", the script will use that string as image version, and start to\n");
     printf("check/update image header fields.\n");
@@ -636,8 +595,6 @@ void printHelp()
 //
 // Description: main for the script
 //
-// Flow:            FN=None
-// 
 // End Function Specification
 int main(int argc, char* argv[])
 {
@@ -679,7 +636,7 @@ int main(int argc, char* argv[])
             }
             break;
         }
-        //@pb006a - display size
+
         if( (argc > 2) && (strcmp(argv[2],DISPLAY_SIZE)== 0))
         {
             l_rc = displaySize(argv[1]);
@@ -692,7 +649,7 @@ int main(int argc, char* argv[])
             break;
         }
 
-        // At this point we know there is atleast 1 argument to the program
+        // At this point we know there is at least 1 argument to the program
 
         // Open the file
         l_filePtr = fopen(argv[1], "r+");
diff --git a/src/occBootLoader/linkboot.cmd b/src/occBootLoader/linkboot.cmd
index 544240e..816cca7 100755
--- a/src/occBootLoader/linkboot.cmd
+++ b/src/occBootLoader/linkboot.cmd
@@ -1,11 +1,32 @@
+// IBM_PROLOG_BEGIN_TAG
+// This is an automatically generated prolog.
+//
+// $Source: src/occBootLoader/linkboot.cmd$
+//
+// OpenPOWER OnChipController Project
+//
+// Contributors Listed Below - COPYRIGHT 2011,2014
+// [+] Google Inc.
+// [+] International Business Machines Corp.
+//
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+// http://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+// implied. See the License for the specific language governing
+// permissions and limitations under the License.
+//
+// IBM_PROLOG_END_TAG
 
-// $Id$
-
-
-// This linker script for the OCC Firmware boot loader. This
-// script is processed through the C proprocessor to create
-// configuration-dependent images. 
-// This creates image that is 4 byte aligned.
+// Linker script for the OCC Firmware boot loader.
+//
+// The image is 4 byte aligned.
 
 #ifdef OCCMK
 INCLUDE occLinkInputFile
@@ -14,31 +35,30 @@ INCLUDE occLinkInputFile
 #define BOOT_IMAGE_START_ADDR   0x00000000
 #define BOOT_VECTORS            0x00000000
 #define BOOT_VECTORS_SIZE       0x00000740
-#define BOOT_BUILDNAME_ADDR    (BOOT_IMAGE_START_ADDR + BOOT_VECTORS_SIZE)
+#define BOOT_BUILDNAME_ADDR     (BOOT_IMAGE_START_ADDR + BOOT_VECTORS_SIZE)
 #define WRITE_DATA_SEC_ADDR     0x80000000
 #define BYTE_ALIGN 128
 #define pack_0000 bootMain.o(imageHeader)
 
 MEMORY
 {
-   writeableMem : ORIGIN = WRITE_DATA_SEC_ADDR, LENGTH = 0x4000
+    writeableMem : ORIGIN = WRITE_DATA_SEC_ADDR, LENGTH = 0x4000
 }
 
 SECTIONS
 {
     . = BOOT_IMAGE_START_ADDR;
     . = BOOT_VECTORS;
- 
+
     __START_ADDR__ = .;
-    
+
     ////////////////////////////////
     // start read-only section
-    ////////////////////////////////    
+    ////////////////////////////////
 
     ////////////////////////////////
     // exception/vector section
-    ////////////////////////////////    
-
+    ////////////////////////////////
     .exceptions . : {
         ___vectors = .;
         bootInit.o(.vectors_0000)
@@ -57,61 +77,56 @@ SECTIONS
         bootInit.o(.vectors_0600)
         . = ___vectors + 0x0700;
         bootInit.o(.vectors_0700)
-        } 
+        }
 
     ////////////////////////////////
     // buildname section 4 byte aligned
-    //////////////////////////////// 
+    ////////////////////////////////
     . = BOOT_BUILDNAME_ADDR;
     .buildname . : { *(.buildname) }
 
     ////////////////////////////////
     // text section 4 byte aligned, follows buildname section
     ////////////////////////////////
-    // >> gitprep
-    .text . : { *(.text) *(.text.*) . = ALIGN(BYTE_ALIGN);} 
-    // << gitprep
+    .text . : { *(.text) *(.text.*) . = ALIGN(BYTE_ALIGN); }
+
+    ////////////////////////////////
+    // SDA2 section 4 byte aligned
     ////////////////////////////////
-    // SDA2 section  4 byte aligned
-    ////////////////////////////////    
-    
-    _SDA2_BASE_ = .;    
-    .sdata2 . : { *(.sdata2) . = ALIGN(BYTE_ALIGN); } 
-    .sbss2 . : { *(.sbss2) . = ALIGN(BYTE_ALIGN);} 
+    _SDA2_BASE_ = .;
+    .sdata2 . : { *(.sdata2) . = ALIGN(BYTE_ALIGN); }
+    .sbss2 . : { *(.sbss2) . = ALIGN(BYTE_ALIGN); }
 
-    .rodata . : { *(.rodata*) *(.got2) . = ALIGN(BYTE_ALIGN);} 
-    
-    __READ_ONLY_DATA_LEN__ = . - BOOT_IMAGE_START_ADDR ;
+    .rodata . : { *(.rodata*) *(.got2) . = ALIGN(BYTE_ALIGN); }
+
+    __READ_ONLY_DATA_LEN__ = . - BOOT_IMAGE_START_ADDR;
     __WRITEABLE_ADDR__ = .;
-   
+
+    ////////////////////////////////
+    // start writeable section, has different virtual and loadable memory addresses
     ////////////////////////////////
-    // start writeable section has different vritual and loadable memory address
-    ////////////////////////////////    
     __WRITEABLE_DATA_ADDR__ = WRITE_DATA_SEC_ADDR;
     __CURADDR__ = WRITE_DATA_SEC_ADDR;
 
     ////////////////////////////////
     // read-write section
-    ////////////////////////////////    
-   .rela   __CURADDR__ : AT(__WRITEABLE_ADDR__ ) { *(.rela*) . = ALIGN(BYTE_ALIGN);} > writeableMem
-   __CURADDR__ = __CURADDR__ + SIZEOF(.rela);
-   .rwdata __CURADDR__ : AT(__WRITEABLE_ADDR__ + SIZEOF(.rela)) { *(.data) *(.bss) *(COMMON) . = ALIGN(BYTE_ALIGN);} > writeableMem
-   __CURADDR__ = __CURADDR__ + SIZEOF(.rwdata);
-    
+    ////////////////////////////////
+    .rela __CURADDR__ : AT(__WRITEABLE_ADDR__) { *(.rela*) . = ALIGN(BYTE_ALIGN); } > writeableMem
+    __CURADDR__ = __CURADDR__ + SIZEOF(.rela);
+    .rwdata __CURADDR__ : AT(__WRITEABLE_ADDR__ + SIZEOF(.rela)) { *(.data) *(.bss) *(COMMON) . = ALIGN(BYTE_ALIGN); } > writeableMem
+    __CURADDR__ = __CURADDR__ + SIZEOF(.rwdata);
+
     ////////////////////////////////
     // SDA section
-    ////////////////////////////////    
-     _SDA_BASE_ = __CURADDR__;
-   .sdata  __CURADDR__ : AT(__WRITEABLE_ADDR__ + SIZEOF(.rela) + SIZEOF(.rwdata)) { *(.sdata) . = ALIGN(BYTE_ALIGN);}  > writeableMem
-   __CURADDR__ = __CURADDR__ + SIZEOF(.sdata);
-   .sbss   (__CURADDR__) : AT( __WRITEABLE_ADDR__ + SIZEOF(.rela) + SIZEOF(.rwdata) + SIZEOF(.sdata) ) { *(.sbss)  . = ALIGN(BYTE_ALIGN); }  > writeableMem
-   __CURADDR__ = __CURADDR__ + SIZEOF(.sbss);
-   
-    ////////////////////////////////
-    // writeable section length is all writeable section except .sbss as 
-    // .sbss section is not showing up in the binary unless there is some data
-    // in the section below it. Thus it is left at the end to get same 
-    // behavior all the time.
-    ////////////////////////////////    
-   __WRITEABLE_DATA_LEN__ =  (__WRITEABLE_ADDR__ + SIZEOF(.sdata) + SIZEOF(.rela) + SIZEOF(.rwdata)) - __WRITEABLE_ADDR__;
+    ////////////////////////////////
+    _SDA_BASE_ = __CURADDR__;
+    .sdata __CURADDR__ : AT(__WRITEABLE_ADDR__ + SIZEOF(.rela) + SIZEOF(.rwdata)) { *(.sdata) . = ALIGN(BYTE_ALIGN); } > writeableMem
+    __CURADDR__ = __CURADDR__ + SIZEOF(.sdata);
+    .sbss (__CURADDR__) : AT(__WRITEABLE_ADDR__ + SIZEOF(.rela) + SIZEOF(.rwdata) + SIZEOF(.sdata)) { *(.sbss) . = ALIGN(BYTE_ALIGN); } > writeableMem
+    __CURADDR__ = __CURADDR__ + SIZEOF(.sbss);
+
+    ////////////////////////////////
+    // writeable section length
+    ////////////////////////////////
+   __WRITEABLE_DATA_LEN__ = (__WRITEABLE_ADDR__ + SIZEOF(.sdata) + SIZEOF(.rela) + SIZEOF(.rwdata)) - __WRITEABLE_ADDR__;
 }
diff --git a/src/occBootLoader/occLinkInputFile b/src/occBootLoader/occLinkInputFile
index 6fe2f9a..eaf6ce3 100644
--- a/src/occBootLoader/occLinkInputFile
+++ b/src/occBootLoader/occLinkInputFile
@@ -1 +1,26 @@
+# IBM_PROLOG_BEGIN_TAG
+# This is an automatically generated prolog.
+#
+# $Source: src/occBootLoader/occLinkInputFile$
+#
+# OpenPOWER OnChipController Project
+#
+# Contributors Listed Below - COPYRIGHT 2011,2014
+# [+] Google Inc.
+# [+] International Business Machines Corp.
+#
+#
+# Licensed under the Apache License, Version 2.0 (the "License");
+# you may not use this file except in compliance with the License.
+# You may obtain a copy of the License at
+#
+# http://www.apache.org/licenses/LICENSE-2.0
+#
+# Unless required by applicable law or agreed to in writing, software
+# distributed under the License is distributed on an "AS IS" BASIS,
+# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
+# implied. See the License for the specific language governing
+# permissions and limitations under the License.
+#
+# IBM_PROLOG_END_TAG
 INPUT ( bootMain.o ../occ/occbuildname.o bootInit.o ../ssx/ppc32/savegpr.o )