diff options
| author | Wael El-Essawy <welessa@us.ibm.com> | 2016-04-05 12:03:34 -0500 |
|---|---|---|
| committer | Wael El-Essawy <welessa@us.ibm.com> | 2016-05-03 18:55:23 -0400 |
| commit | db69c499974c1aaa961bfde439e2fd770123a27b (patch) | |
| tree | 74b17ef73c5b497df15cac62e52b985b6987cadc /src/lib/ppc405lib | |
| parent | 8a7f3c6739f022df1c128b9d5a479e7abfac0ec1 (diff) | |
| download | talos-occ-db69c499974c1aaa961bfde439e2fd770123a27b.tar.gz talos-occ-db69c499974c1aaa961bfde439e2fd770123a27b.zip | |
Change attention type default to FSP
Change-Id: I6661e64e2bb29762ba038bddcebd9e6b4afcf85e
RTC: 147814
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/23618
Tested-by: FSP CI Jenkins
Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Reviewed-by: Wael El-Essawy <welessa@us.ibm.com>
Diffstat (limited to 'src/lib/ppc405lib')
| -rw-r--r-- | src/lib/ppc405lib/chip_config.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/lib/ppc405lib/chip_config.h b/src/lib/ppc405lib/chip_config.h index cc772e2..6bb2753 100644 --- a/src/lib/ppc405lib/chip_config.h +++ b/src/lib/ppc405lib/chip_config.h @@ -62,7 +62,7 @@ typedef uint8_t ChipConfigCentaur; static inline uint32_t pore_exe_mask(ChipConfig config) { - return (uint32_t)((config >> 32) & 0xffff0000); + return (uint32_t)((config >> 32) & 0xffffff00); } #endif @@ -71,7 +71,7 @@ pore_exe_mask(ChipConfig config) static inline uint32_t left_justify_core_config(ChipConfig config) { - return (uint32_t)((config >> 32) & 0xffff0000); + return (uint32_t)((config >> 32) & 0xffffff00); } /// Left justify and mask MCS configuration into a uint32_t |
