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authorAndres Lugo-Reyes <aalugore@us.ibm.com>2016-12-12 14:48:59 -0600
committerWilliam A. Bryan <wilbryan@us.ibm.com>2016-12-15 15:49:58 -0500
commit08961278f496e058964d217593a06303ea96b4f3 (patch)
tree1291d786b08ee9aea76819924a79a4ba5bcadc39 /src/common
parente350693c96096f1e607423c974082bf3d0b2a7ae (diff)
downloadtalos-occ-08961278f496e058964d217593a06303ea96b4f3.tar.gz
talos-occ-08961278f496e058964d217593a06303ea96b4f3.zip
dcom/ thread/ rtls/ TODO clean up
Also moved files common to occ_405/, occ_gpe0/, occ_gpe1/, etc, to a new common directory to keep src/ clean Change-Id: Ib45d70d048a135832592953c955a325d20fa19ae RTC: 163363 Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/33640 Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com> Reviewed-by: Martha Broyles <mbroyles@us.ibm.com> Reviewed-by: William A. Bryan <wilbryan@us.ibm.com>
Diffstat (limited to 'src/common')
-rw-r--r--src/common/apss_structs.h94
-rw-r--r--src/common/dimm_structs.h134
-rw-r--r--src/common/global_app_cfg.h45
-rw-r--r--src/common/gpe_err.h50
-rwxr-xr-xsrc/common/gpe_export.h59
-rw-r--r--src/common/gpe_util.h48
-rw-r--r--src/common/ipc_func_ids.h96
-rw-r--r--src/common/occ_util.h35
-rwxr-xr-xsrc/common/pss_constants.h61
9 files changed, 622 insertions, 0 deletions
diff --git a/src/common/apss_structs.h b/src/common/apss_structs.h
new file mode 100644
index 0000000..af64fe0
--- /dev/null
+++ b/src/common/apss_structs.h
@@ -0,0 +1,94 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/common/apss_structs.h $ */
+/* */
+/* OpenPOWER OnChipController Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2011,2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+
+/* This header file is used by both occ_405 and occ_gpe0. */
+/* Contains common structures and globals. */
+
+#ifndef _APSS_STRUCTS_H
+#define _APSS_STRUCTS_H
+
+#include <gpe_export.h>
+#include "gpe_err.h"
+
+// List of supported APSS Modes set in occ_gpe0/apss_init.c
+#define APSS_MODE_COMPOSITE 0
+#define APSS_MODE_AUTO2 1
+
+
+/* This data structure holds the common args data structures between the */
+/* 405 and the GPE0, used in IPC communications. */
+/* We started by adding these common apss data structures to test the */
+/* code the way it worked before using the GPE assembly. We will */
+/* probably have to add the apssPwrMeasStruct_t to include GPIO, */
+/* measurements, and to maintain a single data structure for all GPE0's */
+/* ASPSS routine (or may be consolidate the three routines in a single */
+/* function) */
+/* this file is now kept in the main src directory. Will probably move to */
+/* a common directory under src (e.g. src/occ_common/include?) */
+
+
+struct apssGpioConfigStruct
+{
+ uint8_t direction;
+ uint8_t drive;
+ uint8_t interrupt;
+} __attribute__ ((__packed__));
+typedef struct apssGpioConfigStruct apssGpioConfigStruct_t;
+
+struct apssModeConfigStruct
+{
+ uint8_t mode;
+ uint8_t numAdcChannelsToRead;
+ uint8_t numGpioPortsToRead;
+} __attribute__ ((__packed__));
+typedef struct apssModeConfigStruct apssModeConfigStruct_t;
+
+typedef struct {
+ GpeErrorStruct error;
+ apssGpioConfigStruct_t config0; // G_gpio_config[0] (input to APSS)
+ apssGpioConfigStruct_t config1; // G_gpio_config[1] (input to APSS)
+} initGpioArgs_t;
+
+typedef struct {
+ GpeErrorStruct error;
+ apssModeConfigStruct_t config; // G_apss_composite_config (input to APSS)
+} setApssModeArgs_t;
+
+typedef struct
+{
+ GpeErrorStruct error;
+} apss_start_args_t;
+
+typedef struct {
+ GpeErrorStruct error;
+ uint64_t meas_data[4]; // G_apss_pwr_meas (1st block of data) (output from APSS)
+} apss_continue_args_t;
+
+typedef struct {
+ GpeErrorStruct error;
+ uint64_t meas_data[4]; // G_apss_pwr_meas (2nd block of data) (output from APSS)
+} apss_complete_args_t;
+
+#endif //_APSS_STRUCTS_H
diff --git a/src/common/dimm_structs.h b/src/common/dimm_structs.h
new file mode 100644
index 0000000..39ffbad
--- /dev/null
+++ b/src/common/dimm_structs.h
@@ -0,0 +1,134 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/dimm_structs.h $ */
+/* */
+/* OpenPOWER OnChipController Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+
+/* This header file is used by both occ_405 and occ_gpe1. */
+/* Contains common structures and globals. */
+
+#ifndef _DIMM_STRUCTS_H
+#define _DIMM_STRUCTS_H
+
+#include "occ_util.h"
+#include <gpe_export.h>
+#include "gpe_err.h"
+//#include "occ_sys_config.h"
+
+
+// DIMM States (GPE1)
+typedef enum
+{
+ DIMM_STATE_INIT = 0x01, // Init interrupt registers
+ DIMM_STATE_WRITE_MODE = 0x02, // Set the mode (speed and port)
+ DIMM_STATE_WRITE_ADDR = 0x03, // Write the temp sensor address
+ DIMM_STATE_INITIATE_READ = 0x04, // Start the read
+ DIMM_STATE_READ_TEMP = 0x05, // Return the sensor reading
+ DIMM_STATE_RESET_MASTER = 0x06, // Reset master
+ DIMM_STATE_RESET_SLAVE_P0 = 0x07, // Start of slave port 0 reset
+ DIMM_STATE_RESET_SLAVE_P0_WAIT = 0x08,
+ DIMM_STATE_RESET_SLAVE_P0_COMPLETE = 0x09,
+ DIMM_STATE_RESET_SLAVE_P1 = 0x0A, // Start of slave port 1 reset
+ DIMM_STATE_RESET_SLAVE_P1_WAIT = 0x0B,
+ DIMM_STATE_RESET_SLAVE_P1_COMPLETE = 0x0C,
+} DIMM_STATE;
+
+// DIMM State Machine arguments (GPE1)
+typedef struct
+{
+ GpeErrorStruct error;
+ uint8_t state;
+ uint8_t i2cEngine;
+ uint8_t i2cAddr;
+ uint8_t i2cPort;
+ uint8_t dimm;
+ uint8_t maxPorts;
+ uint8_t temp;
+} dimm_sm_args_t;
+
+//convenient format for storing throttle settings
+typedef union
+{
+ uint32_t word32;
+ struct
+ {
+ uint32_t slot_n: 15; // DIMM Slot N Value
+ uint32_t port_n: 16; // DIMM port N Value
+ uint32_t new_n: 1; // New N Value?
+ };
+} dimm_n_value_t;
+
+
+typedef struct
+{
+ GpeErrorStruct error;
+ uint8_t mc;
+ uint8_t port;
+ dimm_n_value_t dimmNumeratorValues;
+} dimm_control_args_t;
+
+
+typedef struct
+{
+ GpeErrorStruct error;
+ uint8_t mca;
+} reset_mem_deadman_args_t;
+
+// Base Address of NIMBUS MCA.
+#define DIMM_MCA_BASE_ADDRESS 0x07010800
+
+/*
+MC/Port Address MCA Port Address Control Addr SCOM Address
+mc01.port0 0x07010800 + 0x00000116 = 0x07010916
+mc01.port1 0x07010840 + 0x00000116 = 0x07010956
+mc01.port2 0x07010880 + 0x00000116 = 0x07010996
+mc01.port3 0x070108C0 + 0x00000116 = 0x070109D6
+mc23.port0 0x08010800 + 0x00000116 = 0x08010916
+mc23.port1 0x08010840 + 0x00000116 = 0x08010956
+mc23.port2 0x08010880 + 0x00000116 = 0x08010996
+mc23.port3 0x080108C0 + 0x00000116 = 0x080109D6
+ */
+
+// N/M DIMM Throttling Control SCOM Register Addresses macro
+#define N_M_DIMM_TCR(mc,port) (DIMM_MCA_BASE_ADDRESS + 0x116 + \
+ (0x01000000 * (mc)) + ( 0x40 * (port)))
+
+/*
+MC/Port Address MCA Port Address Deadman Offset SCOM Address
+mc01.port0 0x07010800 + 0x0000013C = 0x0701093C
+mc01.port1 0x07010840 + 0x0000013C = 0x0701097C
+mc01.port2 0x07010880 + 0x0000013C = 0x070109BC
+mc01.port3 0x070108C0 + 0x0000013C = 0x070109FC
+mc23.port0 0x08010800 + 0x0000013C = 0x0801093C
+mc23.port1 0x08010840 + 0x0000013C = 0x0801097C
+mc23.port2 0x08010880 + 0x0000013C = 0x080109BC
+mc23.port3 0x080108C0 + 0x0000013C = 0x080109FC
+ */
+
+// NIMBUS DIMM Deadman SCOM Register Addresses macro
+#define DEADMAN_TIMER_PORT(mc,port) (DIMM_MCA_BASE_ADDRESS + 0x13C + \
+ (0x01000000 * (mc)) + ( 0x40 * (port)))
+
+#define DEADMAN_TIMER_MCA(mca) (DIMM_MCA_BASE_ADDRESS + 0x13C + \
+ (0x01000000 * (mca>>2)) + ( 0x40 * (mca&3)))
+
+#endif // _DIMM_STRUCTS_H
diff --git a/src/common/global_app_cfg.h b/src/common/global_app_cfg.h
new file mode 100644
index 0000000..50bbea1
--- /dev/null
+++ b/src/common/global_app_cfg.h
@@ -0,0 +1,45 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/common/global_app_cfg.h $ */
+/* */
+/* OpenPOWER OnChipController Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+#define GLOBAL_CFG_USE_IPC // have lib/occlib/ipc_structs.h use "ipc_func_ids.h"
+#define OCCHW_IRQ_ROUTE_OWNER 4
+
+/// All GPE's will use the external timebase register
+#define APPCFG_USE_EXT_TIMEBASE
+
+#define DEFAULT_NEST_FREQ_HZ 600000000
+#define DEFAULT_EXT_CLK_FREQ_HZ 37500000
+
+// If we are using the OCB timebase then assume
+// a frequency of 37.5Mhz. Otherwise, the default is to use
+// the decrementer as a timebase and assume a frequency of
+// 600MHz
+// In product code, this value will be IPL-time configurable.
+#ifdef APPCFG_USE_EXT_TIMEBASE
+#define PPE_TIMEBASE_HZ DEFAULT_EXT_CLK_FREQ_HZ
+#else
+#define PPE_TIMEBASE_HZ DEFAULT_NEST_FREQ_HZ
+#endif /* APPCFG_USE_EXT_TIMEBASE */
+
+
diff --git a/src/common/gpe_err.h b/src/common/gpe_err.h
new file mode 100644
index 0000000..c759993
--- /dev/null
+++ b/src/common/gpe_err.h
@@ -0,0 +1,50 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/gpe_err.h $ */
+/* */
+/* OpenPOWER OnChipController Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2011,2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+
+/* This header file is used by all gpes */
+/* Contains common gpe return codes */
+
+#ifndef _GPE_ERR_H
+#define _GPE_ERR_H
+
+// List of general gpe Return Codes
+#define GPE_RC_SUCCESS 0x00 // Success: No Errors
+#define GPE_RC_SPI_TIMEOUT 0x01 // Timeout on previous SPI transaction
+#define GPE_RC_SCOM_GET_FAILED 0x02 // Error on a SCOM read
+#define GPE_RC_SCOM_PUT_FAILED 0x03 // Error on a SCOM write
+#define GPE_RC_INVALID_REG 0x04 // Invalid SCOM Register used
+#define GPE_RC_IPC_SEND_FAILED 0x05 // Failed to send an IPC message
+#define GPE_RC_I2C_ERROR 0x06 // I2C error occurred
+#define GPE_RC_INVALID_STATE 0x07 // Invalid state for requested operation
+#define GPE_RC_NOT_COMPLETE 0x08 // Last operation did not complete
+
+// APSS Specific gpe return Codes
+#define GPE_RC_INVALID_APSS_MODE 0x40 // OCC requested undefined APSS mode
+
+// Core Data Errors
+#define GPE_RC_GET_CORE_DATA_FAILED 0x60 // Failed to collect core data
+#define GPE_RC_GET_NEST_DTS_FAILED 0x61 // Failed to collect nest DTS temperatures
+
+#endif //_GPE_ERR_H
diff --git a/src/common/gpe_export.h b/src/common/gpe_export.h
new file mode 100755
index 0000000..9c53f77
--- /dev/null
+++ b/src/common/gpe_export.h
@@ -0,0 +1,59 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/gpe_export.h $ */
+/* */
+/* OpenPOWER OnChipController Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2011,2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+
+#ifndef _GPE_EXPORT_H
+#define _GPE_EXPORT_H
+
+#include "gpe_err.h"
+
+// GPE Error structure (common to both GPEs)
+typedef struct {
+ union
+ {
+ struct {
+ uint32_t rc;
+ uint32_t addr;
+ };
+ uint64_t error;
+ };
+ uint64_t ffdc;
+} GpeErrorStruct;
+
+// Arguments for doing a SCOM from GPE0
+typedef struct ipc_scom_op
+{
+ GpeErrorStruct error; // Error of SCOM operation
+ uint32_t addr; // Register address
+ uint64_t data; // Data for read/write
+ uint32_t size; // Size of data buffer
+ uint8_t read; // Read (1) or write (0)
+} ipc_scom_op_t;
+
+typedef struct nop
+{
+ GpeErrorStruct error; // Error of operation
+} nop_t;
+
+#endif //_GPE_EXPORT_H
diff --git a/src/common/gpe_util.h b/src/common/gpe_util.h
new file mode 100644
index 0000000..07dcb39
--- /dev/null
+++ b/src/common/gpe_util.h
@@ -0,0 +1,48 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/common/gpe_util.h $ */
+/* */
+/* OpenPOWER OnChipController Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+
+#ifndef _APSS_UTIL_H
+#define _APSS_UTIL_H
+
+#include <apss_structs.h>
+#include <common_types.h>
+#include <ipc_structs.h>
+#include <ipc_async_cmd.h>
+
+void gpe_set_ffdc(GpeErrorStruct *o_error, uint32_t i_addr, uint32_t i_rc, uint64_t i_ffdc);
+
+int wait_spi_completion(GpeErrorStruct *error, uint32_t reg, uint8_t timeout);
+
+// Read decrementer register
+#define MFDEC(reg_var) \
+asm volatile \
+ ( \
+ " mfdec %[dec_var] \n" \
+ : [dec_var]"=r"(reg_var) \
+ );
+
+void busy_wait(uint32_t t_microseconds);
+
+#endif //_APSS_UTIL_H
diff --git a/src/common/ipc_func_ids.h b/src/common/ipc_func_ids.h
new file mode 100644
index 0000000..72193b5
--- /dev/null
+++ b/src/common/ipc_func_ids.h
@@ -0,0 +1,96 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/ipc_func_ids.h $ */
+/* */
+/* OpenPOWER OnChipController Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2015,2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+#ifndef __IPC_FUNC_IDS_H__
+#define __IPC_FUNC_IDS_H__
+
+/// \file ipc_func_ids.h
+/// \brief This file contains the definition of function ID used for
+/// interprocessor communications (IPC) in the OCC.
+///
+
+// This is a global file that defines all of the valid IPC function ID's.
+
+// comment this out if you do not want to use the ping utility provided by the IPC library
+#define IPC_ENABLE_PING
+
+// NOTE: MT Multi Target, ST = Single Target
+IPC_FUNCIDS_TABLE_START
+
+ //This is where common function ID's that any instance can support should be
+ //defined.
+ IPC_FUNCIDS_MT_START
+#ifdef IPC_ENABLE_PING
+ IPC_FUNC_ID(IPC_MT_PING) //anyone can ping anyone else
+#endif
+ IPC_FUNCIDS_MT_END
+
+ //Functions that are only supported by GPE0 should be defined here
+ //These function ID's can only be sent to GPE0
+ IPC_FUNCIDS_ST_START(OCCHW_INST_ID_GPE0)
+ IPC_FUNC_ID(IPC_ST_TEST_FUNC0)
+ IPC_FUNC_ID(IPC_ST_APSS_INIT_GPIO_FUNCID)
+ IPC_FUNC_ID(IPC_ST_APSS_INIT_MODE_FUNCID)
+ IPC_FUNC_ID(IPC_ST_APSS_START_PWR_MEAS_READ_FUNCID)
+ IPC_FUNC_ID(IPC_ST_APSS_CONTINUE_PWR_MEAS_READ_FUNCID)
+ IPC_FUNC_ID(IPC_ST_APSS_COMPLETE_PWR_MEAS_READ_FUNCID)
+ IPC_FUNC_ID(IPC_ST_GET_CORE_DATA_FUNCID)
+ IPC_FUNC_ID(IPC_ST_SCOM_OPERATION)
+ IPC_FUNC_ID(IPC_ST_GPE0_NOP)
+ IPC_FUNC_ID(IPC_ST_GET_NEST_DTS_FUNCID)
+ IPC_FUNCIDS_ST_END(OCCHW_INST_ID_GPE0)
+
+ //Functions that are only supported by GPE1 should be defined here
+ //These function ID's can only be sent to GPE1
+ IPC_FUNCIDS_ST_START(OCCHW_INST_ID_GPE1)
+ IPC_FUNC_ID(IPC_ST_DIMM_SM_FUNCID)
+ IPC_FUNC_ID(IPC_ST_DIMM_CONTROL_FUNCID)
+ IPC_FUNC_ID(IPC_ST_GPE1_NOP)
+ IPC_FUNC_ID(IPC_ST_RESET_MEM_DEADMAN)
+ IPC_FUNCIDS_ST_END(OCCHW_INST_ID_GPE1)
+
+ //Functions that are only supported by GPE2 should be defined here
+ //These function ID's can only be sent to GPE2 (PGPE)
+ IPC_FUNCIDS_ST_START(OCCHW_INST_ID_GPE2)
+ IPC_FUNC_ID(IPC_PGPE_INVALID_FUNCID)
+ IPC_FUNC_ID(IPC_PGPE_START_SUSPEND_FUNCID)
+ IPC_FUNC_ID(IPC_PGPE_CLIPS_FUNCID)
+ IPC_FUNC_ID(IPC_PGPE_SET_PMCR_FUNCID)
+ IPC_FUNC_ID(IPC_PGPE_WOF_CONTROL_FUNCID)
+ IPC_FUNC_ID(IPC_PGPE_WOF_VFRT_FUNCID)
+ IPC_FUNCIDS_ST_END(OCCHW_INST_ID_GPE2)
+
+ //Functions that are only supported by GPE3 should be defined here
+ //These function ID's can only be sent to GPE3
+ IPC_FUNCIDS_ST_START(OCCHW_INST_ID_GPE3)
+ IPC_FUNCIDS_ST_END(OCCHW_INST_ID_GPE3)
+
+ //Functions that are only supported by PPC should be defined here
+ //These function ID's can only be sent to the PPC
+ IPC_FUNCIDS_ST_START(OCCHW_INST_ID_PPC)
+ IPC_FUNCIDS_ST_END(OCCHW_INST_ID_PPC)
+
+IPC_FUNCIDS_TABLE_END
+
+#endif /*__IPC_FUNC_IDS_H__*/
diff --git a/src/common/occ_util.h b/src/common/occ_util.h
new file mode 100644
index 0000000..1a21be5
--- /dev/null
+++ b/src/common/occ_util.h
@@ -0,0 +1,35 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/occ_util.h $ */
+/* */
+/* OpenPOWER OnChipController Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+
+/* This header file is used by both occ_405 and occ_gpe1. */
+/* Contains common structures and globals. */
+
+#ifndef _OCC_UTIL_H
+#define _OCC_UTIL_H
+
+#define WORD_HIGH(data) ((uint32_t)(((uint64_t)data)>>32))
+#define WORD_LOW(data) ((uint32_t)(((uint64_t)data)&0xFFFFFFFF))
+
+#endif // _OCC_UTIL_H
diff --git a/src/common/pss_constants.h b/src/common/pss_constants.h
new file mode 100755
index 0000000..08a7d90
--- /dev/null
+++ b/src/common/pss_constants.h
@@ -0,0 +1,61 @@
+/* IBM_PROLOG_BEGIN_TAG */
+/* This is an automatically generated prolog. */
+/* */
+/* $Source: src/occ_gpe0/pss_constants.h $ */
+/* */
+/* OpenPOWER OnChipController Project */
+/* */
+/* Contributors Listed Below - COPYRIGHT 2011,2016 */
+/* [+] International Business Machines Corp. */
+/* */
+/* */
+/* Licensed under the Apache License, Version 2.0 (the "License"); */
+/* you may not use this file except in compliance with the License. */
+/* You may obtain a copy of the License at */
+/* */
+/* http://www.apache.org/licenses/LICENSE-2.0 */
+/* */
+/* Unless required by applicable law or agreed to in writing, software */
+/* distributed under the License is distributed on an "AS IS" BASIS, */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or */
+/* implied. See the License for the specific language governing */
+/* permissions and limitations under the License. */
+/* */
+/* IBM_PROLOG_END_TAG */
+
+#ifndef _PSS_CONSTANTS_H
+#define _PSS_CONSTANTS_H
+
+
+#define SPIPSS_REGISTER_BASE 0x00070000
+#define SPIPSS_ADC_CTRL_REG0 (SPIPSS_REGISTER_BASE + 0x00)
+#define SPIPSS_ADC_CTRL_REG1 (SPIPSS_REGISTER_BASE + 0x01)
+#define SPIPSS_ADC_CTRL_REG2 (SPIPSS_REGISTER_BASE + 0x02)
+#define SPIPSS_ADC_STATUS_REG (SPIPSS_REGISTER_BASE + 0x03)
+#define SPIPSS_ADC_COMMAND_REG (SPIPSS_REGISTER_BASE + 0x04)
+#define SPIPSS_ADC_RESET_REG (SPIPSS_REGISTER_BASE + 0x05)
+#define SPIPSS_ADC_WDATA_REG (SPIPSS_REGISTER_BASE + 0x10)
+#define SPIPSS_ADC_RDATA_REG0 (SPIPSS_REGISTER_BASE + 0x20)
+#define SPIPSS_ADC_RDATA_REG1 (SPIPSS_REGISTER_BASE + 0x21)
+#define SPIPSS_ADC_RDATA_REG2 (SPIPSS_REGISTER_BASE + 0x22)
+#define SPIPSS_ADC_RDATA_REG3 (SPIPSS_REGISTER_BASE + 0x23)
+#define SPIPSS_ADC_RDATA_REG4 (SPIPSS_REGISTER_BASE + 0x24)
+#define SPIPSS_ADC_RDATA_REG5 (SPIPSS_REGISTER_BASE + 0x25)
+#define SPIPSS_ADC_RDATA_REG6 (SPIPSS_REGISTER_BASE + 0x26)
+#define SPIPSS_ADC_RDATA_REG7 (SPIPSS_REGISTER_BASE + 0x27)
+#define SPIPSS_100NS_REG (SPIPSS_REGISTER_BASE + 0x28)
+#define SPIPSS_P2S_CTRL_REG0 (SPIPSS_REGISTER_BASE + 0x40)
+#define SPIPSS_P2S_CTRL_REG1 (SPIPSS_REGISTER_BASE + 0x41)
+#define SPIPSS_P2S_CTRL_REG2 (SPIPSS_REGISTER_BASE + 0x42)
+#define SPIPSS_P2S_STATUS_REG (SPIPSS_REGISTER_BASE + 0x43)
+#define SPIPSS_P2S_COMMAND_REG (SPIPSS_REGISTER_BASE + 0x44)
+#define SPIPSS_P2S_WDATA_REG (SPIPSS_REGISTER_BASE + 0x50)
+#define SPIPSS_P2S_RDATA_REG (SPIPSS_REGISTER_BASE + 0x60)
+
+#define TOD_VALUE_REG 0x00040020
+
+// Constant for use in wait statments: waits (5 * MICROSECONDS)
+#define MICROSECONDS 600
+
+
+#endif //_PSS_CONSTANTS_H
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