Tool to parse raw WOF hex data

Change-Id: I5ae1c1e20f124bf47226549338aca4a2691f411c
Reviewed-on: http://ralgit01.raleigh.ibm.com/gerrit1/58728
Tested-by: FSP CI Jenkins <fsp-CI-jenkins+hostboot@us.ibm.com>
Reviewed-by: Martha Broyles <mbroyles@us.ibm.com>
Reviewed-by: Christopher J. Cain <cjcain@us.ibm.com>
Reviewed-by: Andres A. Lugo-Reyes <aalugore@us.ibm.com>

4 files changed, 683 insertions, 138 deletions

diff --git a/src/tools/ffdcparser/Makefile b/src/tools/ffdcparser/Makefile
index 3521af1..7a5df00 100644
--- a/src/tools/ffdcparser/Makefile
+++ b/src/tools/ffdcparser/Makefile
@@ -5,7 +5,7 @@
 #
 # OpenPOWER OnChipController Project
 #
-# Contributors Listed Below - COPYRIGHT 2016
+# Contributors Listed Below - COPYRIGHT 2016,2018
 # [+] International Business Machines Corp.
 #
 #
@@ -22,5 +22,6 @@
 # permissions and limitations under the License.
 #
 # IBM_PROLOG_END_TAG
-all: ffdcparser.c
+all: ffdcparser.c wofparser.c
 	gcc ffdcparser.c -o ../../../obj/ppetools/ffdcparser
+	gcc wofparser.c -o ../../../obj/ppetools/wofparser
diff --git a/src/tools/ffdcparser/ffdcparser.c b/src/tools/ffdcparser/ffdcparser.c
index 5fcaaa6..b337a2e 100644
--- a/src/tools/ffdcparser/ffdcparser.c
+++ b/src/tools/ffdcparser/ffdcparser.c
@@ -5,7 +5,7 @@
 /*                                                                        */
 /* OpenPOWER OnChipController Project                                     */
 /*                                                                        */
-/* Contributors Listed Below - COPYRIGHT 2016,2017                        */
+/* Contributors Listed Below - COPYRIGHT 2016,2018                        */
 /* [+] International Business Machines Corp.                              */
 /*                                                                        */
 /*                                                                        */
@@ -25,144 +25,10 @@
 #include <stdio.h>
 #include <stdint.h>
 #include <sys/stat.h>
-
+#include "parser_common.h"
 // NOTE: This tool is to be used when FFDC is dumped by the OCC, and currently
 //       only accepts input files in binary format.
 
-typedef struct __attribute__((packed,aligned(4))) thread_dump
-{
-    uint8_t     len;
-    uint8_t     pri;
-    uint8_t     state;
-    uint8_t     flags;
-    uint32_t    timer;
-    uint32_t    sem;
-    uint32_t    srr0;
-    uint32_t    srr1;
-    uint32_t    srr2;
-    uint32_t    srr3;
-    uint32_t    lr;
-    uint32_t stack_trace[8];
-} thread_dump_t;
-
-// FFDC struct
-typedef struct __attribute__((packed,aligned(4))) ffdc
-{
-    uint8_t     seq;        // Sequence Number (0x00 for FFDC)
-    uint8_t     cmd;        // Command (0x00 for FFDC)
-    uint8_t     excp;       // Exception Code
-    uint16_t    len;        // FFDC data length
-    uint8_t     reserved;   // (0x00 for FFDC)
-    uint16_t    ckpt;       // Checkpoint (usually 0x0F00 for FFDC)
-    uint32_t    ssx_panic;  // SSX Panic Code
-    uint32_t    panic_addr; // Address of panic instruction
-    uint32_t    lr;         // Link Register
-    uint32_t    msr;        // Machine Status Register
-    uint32_t    cr;         // Condition Register
-    uint32_t    ctr;        // Count Register
-    uint32_t    gpr[32];    // GPR0 - GPR31
-    uint32_t    evpr;       // Exception Vector Prefix Register
-    uint32_t    xer;        // Fixedpoint Exception Register
-    uint32_t    esr;        // Exception Syndrome Register
-    uint32_t    dear;       // Bad Address
-    uint32_t    srr0;       // Return Address for Non-Crit Interrupts
-    uint32_t    srr1;       // MSR at time of non-crit interrupt
-    uint32_t    srr2;       // Return Address for Crit Interrupts
-    uint32_t    srr3;       // MSR at time of crit interrupt
-    uint32_t    mcsr;       // Machine Check Syndrome Register
-    uint32_t    pid;        // Process ID Register
-    uint32_t    zpr;        // Zone Protection Register
-    uint32_t    usprg0;     // User SPR General Purpose Register
-    uint32_t    sprg[8];    // SPRG0 - SPRG7
-    uint32_t    tcr;        // Timer Control Register
-    uint32_t    tsr;        // Timer Status Register
-    uint32_t    dbcr0;      // Debug Control Register0
-    uint32_t    dbcr1;      // Debug Control Register1
-    uint32_t    dbsr;       // Debug Status Register
-    uint32_t    ocb_oisr0;
-    uint32_t    ocb_oisr1;
-    uint32_t    ocb_occmisc;
-    uint32_t    ocb_ohtmcr;
-    uint32_t    ocb_oimr0;
-    uint32_t    ocb_oimr1;
-    uint32_t    ocb_oitr0;
-    uint32_t    ocb_oitr1;
-    uint32_t    ocb_oiepr0;
-    uint32_t    ocb_oiepr1;
-    uint32_t    ocb_oehdr;
-    uint32_t    ocb_ocicfg;
-    uint32_t    ocb_onisr0;
-    uint32_t    ocb_onisr1;
-    uint32_t    ocb_ocisr0;
-    uint32_t    ocb_ocisr1;
-    uint32_t    ocb_occflg;
-    uint32_t    ocb_occhbr;
-    uint32_t    ssx_timebase;
-    char        buildname[16];
-    uint64_t    occlfir;
-    uint64_t    pbafir;
-    uint32_t    cores_deconf;
-    thread_dump_t   main;
-    thread_dump_t   cmdh;
-    thread_dump_t   dcom;
-    uint32_t        stack_trace[8];
-    uint32_t        eye_catcher;
-} ffdc_t;
-
-uint64_t get_uint64(FILE* i_fhndl)
-{
-    int      i = 0;
-    uint64_t ret = 0;
-    uint8_t  byte = 0;
-
-    for(i = 7; i >= 0; i--)
-    {
-        byte = fgetc(i_fhndl);
-        if(EOF != byte)
-        {
-            ret |= (byte << (i*8));
-        }
-    }
-
-    return ret;
-}
-
-uint32_t get_uint32(FILE* i_fhndl)
-{
-    int      i = 0;
-    uint32_t ret = 0;
-    uint8_t  byte = 0;
-
-    for(i = 3; i >= 0; i--)
-    {
-        byte = fgetc(i_fhndl);
-        if(EOF != byte)
-        {
-            ret |= (byte << (i*8));
-        }
-    }
-
-    return ret;
-}
-
-uint16_t get_uint16(FILE* i_fhndl)
-{
-    int      i = 0;
-    uint16_t ret = 0;
-    uint8_t  byte = 0;
-
-    for(i = 1; i >= 0; i--)
-    {
-        byte = fgetc(i_fhndl);
-        if(EOF != byte)
-        {
-            ret |= (byte << (i*8));
-        }
-    }
-
-    return ret;
-}
-
 void get_thread_data(FILE* i_fhndl, thread_dump_t * i_thrd)
 {
     uint32_t i = 0;
diff --git a/src/tools/ffdcparser/parser_common.h b/src/tools/ffdcparser/parser_common.h
new file mode 100644
index 0000000..b6e4bf0
--- /dev/null
+++ b/src/tools/ffdcparser/parser_common.h
@@ -0,0 +1,290 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/tools/ffdcparser/parser_common.h $                        */
+/*                                                                        */
+/* OpenPOWER OnChipController Project                                     */
+/*                                                                        */
+/* Contributors Listed Below - COPYRIGHT 2018                             */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+
+// Constants
+#define MAXIMUM_QUADS 6
+#define CORE_IDDQ_MEASUREMENTS 6
+#define MAX_NUM_CORES 24
+
+// WOF data struct
+typedef struct __attribute__ ((packed))
+{
+    uint32_t wof_disabled;
+    uint8_t  version;
+    uint16_t vfrt_block_size;
+    uint16_t vfrt_blck_hdr_sz;
+    uint16_t vfrt_data_size;
+    uint8_t  active_quads_size;
+    uint8_t  core_count;
+    uint16_t vdn_start;
+    uint16_t vdn_step;
+    uint16_t vdn_size;
+    uint16_t vdd_start;
+    uint16_t vdd_step;
+    uint16_t vdd_size;
+    uint16_t vratio_start;
+    uint16_t vratio_step;
+    uint16_t vratio_size;
+    uint16_t fratio_start;
+    uint16_t fratio_step;
+    uint16_t fratio_size;
+    uint16_t vdn_percent[8];
+    uint16_t socket_power_w;
+    uint16_t nest_freq_mhz;
+    uint16_t nom_freq_mhz;
+    uint16_t rdp_capacity;
+    uint64_t wof_tbls_src_tag;
+    uint64_t package_name_hi;
+    uint64_t package_name_lo;
+    uint16_t vdd_step_from_start;
+    uint16_t vdn_step_from_start;
+    uint8_t quad_step_from_start;
+    uint32_t v_core_100uV[MAXIMUM_QUADS];
+    uint32_t core_pwr_on;
+    uint8_t cores_on_per_quad[MAXIMUM_QUADS];
+    uint32_t voltvddsense_sensor;
+    uint16_t tempprocthrmc[MAX_NUM_CORES];
+    uint16_t tempnest_sensor;
+    uint16_t tempq[MAXIMUM_QUADS];
+    uint16_t curvdd_sensor;
+    uint16_t curvdn_sensor;
+    uint16_t voltvdn_sensor;
+    uint8_t  quad_x_pstates[MAXIMUM_QUADS];
+    uint8_t quad_v_idx[MAXIMUM_QUADS];
+    uint8_t  quad_ivrm_states;
+    uint32_t idc_vdd;
+    uint32_t idc_vdn;
+    uint32_t idc_quad;
+    uint32_t iac_vdd;
+    uint32_t iac_vdn;
+    uint32_t iac_tdp_vdd;
+    uint16_t v_ratio;
+    uint16_t f_ratio;
+    uint16_t v_clip;
+    uint8_t f_clip_ps;
+    uint32_t f_clip_freq;
+    uint32_t ceff_tdp_vdd;
+    uint32_t ceff_vdd;
+    uint32_t ceff_ratio_vdd;
+    uint32_t ceff_tdp_vdn;
+    uint32_t ceff_vdn;
+    uint32_t ceff_ratio_vdn;
+    uint8_t chip_volt_idx;
+    uint32_t all_cores_off_iso;
+    uint32_t all_good_caches_on_iso;
+    uint32_t all_caches_off_iso;
+    uint32_t quad_good_cores_only[MAXIMUM_QUADS];
+    uint16_t quad_on_cores[MAXIMUM_QUADS];
+    uint16_t quad_bad_off_cores[MAXIMUM_QUADS];
+    uint8_t req_active_quad_update;
+    uint8_t prev_req_active_quads;
+    uint8_t num_active_quads;
+    uint32_t curr_ping_pong_buf;
+    uint32_t next_ping_pong_buf;
+    uint32_t curr_vfrt_main_mem_addr;
+    uint32_t next_vfrt_main_mem_addr;
+    uint32_t vfrt_tbls_main_mem_addr;
+    uint32_t vfrt_tbls_len;
+    uint8_t wof_init_state;
+    uint32_t quad_state_0_addr;
+    uint32_t quad_state_1_addr;
+    uint32_t pgpe_wof_state_addr;
+    uint32_t req_active_quads_addr;
+    uint16_t core_leakage_percent;
+    uint32_t pstate_tbl_sram_addr;
+    uint32_t gpe_req_rc;
+    uint32_t control_ipc_rc;
+    uint8_t vfrt_callback_error;
+    uint8_t pgpe_wof_off;
+    uint8_t pgpe_wof_disabled;
+    uint32_t vfrt_mm_offset;
+    uint8_t wof_vfrt_req_rc;
+    uint32_t c_ratio_vdd_volt;
+    uint32_t c_ratio_vdd_freq;
+    uint32_t c_ratio_vdn_volt;
+    uint32_t c_ratio_vdn_freq;
+    uint8_t vfrt_state;
+    uint32_t all_cores_off_before;
+    uint8_t good_quads_per_sort;
+    uint8_t good_normal_cores_per_sort;
+    uint8_t good_caches_per_sort;
+    uint8_t good_normal_cores[MAXIMUM_QUADS];
+    uint8_t good_caches[MAXIMUM_QUADS];
+    uint16_t allGoodCoresCachesOn[CORE_IDDQ_MEASUREMENTS];
+    uint16_t allCoresCachesOff[CORE_IDDQ_MEASUREMENTS];
+    uint16_t coresOffCachesOn[CORE_IDDQ_MEASUREMENTS];
+    uint16_t quad1CoresCachesOn[CORE_IDDQ_MEASUREMENTS];
+    uint16_t quad2CoresCachesOn[CORE_IDDQ_MEASUREMENTS];
+    uint16_t quad3CoresCachesOn[CORE_IDDQ_MEASUREMENTS];
+    uint16_t quad4CoresCachesOn[CORE_IDDQ_MEASUREMENTS];
+    uint16_t quad5CoresCachesOn[CORE_IDDQ_MEASUREMENTS];
+    uint16_t quad6CoresCachesOn[CORE_IDDQ_MEASUREMENTS];
+    uint16_t ivdn[CORE_IDDQ_MEASUREMENTS];
+    uint8_t allCoresCachesOnT[CORE_IDDQ_MEASUREMENTS];
+    uint8_t allCoresCachesOffT[CORE_IDDQ_MEASUREMENTS];
+    uint8_t coresOffCachesOnT[CORE_IDDQ_MEASUREMENTS];
+    uint8_t quad1CoresCachesOnT[CORE_IDDQ_MEASUREMENTS];
+    uint8_t quad2CoresCachesOnT[CORE_IDDQ_MEASUREMENTS];
+    uint8_t quad3CoresCachesOnT[CORE_IDDQ_MEASUREMENTS];
+    uint8_t quad4CoresCachesOnT[CORE_IDDQ_MEASUREMENTS];
+    uint8_t quad5CoresCachesOnT[CORE_IDDQ_MEASUREMENTS];
+    uint8_t quad6CoresCachesOnT[CORE_IDDQ_MEASUREMENTS];
+    uint8_t avgtemp_vdn[CORE_IDDQ_MEASUREMENTS];
+} wof_data_t;
+
+// Thread struct
+typedef struct __attribute__((packed,aligned(4))) thread_dump
+{
+    uint8_t     len;
+    uint8_t     pri;
+    uint8_t     state;
+    uint8_t     flags;
+    uint32_t    timer;
+    uint32_t    sem;
+    uint32_t    srr0;
+    uint32_t    srr1;
+    uint32_t    srr2;
+    uint32_t    srr3;
+    uint32_t    lr;
+    uint32_t    stack_trace[8];
+} thread_dump_t;
+
+// FFDC struct
+typedef struct __attribute__((packed,aligned(4))) ffdc
+{
+    uint8_t     seq;        // Sequence Number (0x00 for FFDC)
+    uint8_t     cmd;        // Command (0x00 for FFDC)
+    uint8_t     excp;       // Exception Code
+    uint16_t    len;        // FFDC data length
+    uint8_t     reserved;   // (0x00 for FFDC)
+    uint16_t    ckpt;       // Checkpoint (usually 0x0F00 for FFDC)
+    uint32_t    ssx_panic;  // SSX Panic Code
+    uint32_t    panic_addr; // Address of panic instruction
+    uint32_t    lr;         // Link Register
+    uint32_t    msr;        // Machine Status Register
+    uint32_t    cr;         // Condition Register
+    uint32_t    ctr;        // Count Register
+    uint32_t    gpr[32];    // GPR0 - GPR31
+    uint32_t    evpr;       // Exception Vector Prefix Register
+    uint32_t    xer;        // Fixedpoint Exception Register
+    uint32_t    esr;        // Exception Syndrome Register
+    uint32_t    dear;       // Bad Address
+    uint32_t    srr0;       // Return Address for Non-Crit Interrupts
+    uint32_t    srr1;       // MSR at time of non-crit interrupt
+    uint32_t    srr2;       // Return Address for Crit Interrupts
+    uint32_t    srr3;       // MSR at time of crit interrupt
+    uint32_t    mcsr;       // Machine Check Syndrome Register
+    uint32_t    pid;        // Process ID Register
+    uint32_t    zpr;        // Zone Protection Register
+    uint32_t    usprg0;     // User SPR General Purpose Register
+    uint32_t    sprg[8];    // SPRG0 - SPRG7
+    uint32_t    tcr;        // Timer Control Register
+    uint32_t    tsr;        // Timer Status Register
+    uint32_t    dbcr0;      // Debug Control Register0
+    uint32_t    dbcr1;      // Debug Control Register1
+    uint32_t    dbsr;       // Debug Status Register
+    uint32_t    ocb_oisr0;
+    uint32_t    ocb_oisr1;
+    uint32_t    ocb_occmisc;
+    uint32_t    ocb_ohtmcr;
+    uint32_t    ocb_oimr0;
+    uint32_t    ocb_oimr1;
+    uint32_t    ocb_oitr0;
+    uint32_t    ocb_oitr1;
+    uint32_t    ocb_oiepr0;
+    uint32_t    ocb_oiepr1;
+    uint32_t    ocb_oehdr;
+    uint32_t    ocb_ocicfg;
+    uint32_t    ocb_onisr0;
+    uint32_t    ocb_onisr1;
+    uint32_t    ocb_ocisr0;
+    uint32_t    ocb_ocisr1;
+    uint32_t    ocb_occflg;
+    uint32_t    ocb_occhbr;
+    uint32_t    ssx_timebase;
+    char        buildname[16];
+    uint64_t    occlfir;
+    uint64_t    pbafir;
+    uint32_t    cores_deconf;
+    thread_dump_t   main;
+    thread_dump_t   cmdh;
+    thread_dump_t   dcom;
+    uint32_t        stack_trace[8];
+    uint32_t        eye_catcher;
+} ffdc_t;
+
+uint64_t get_uint64(FILE* i_fhndl)
+{
+    int      i = 0;
+    uint64_t ret = 0;
+    uint8_t  byte = 0;
+
+    for(i = 7; i >= 0; i--)
+    {
+        byte = fgetc(i_fhndl);
+        if(EOF != byte)
+        {
+            ret |= (byte << (i*8));
+        }
+    }
+
+    return ret;
+}
+
+uint32_t get_uint32(FILE* i_fhndl)
+{
+    int      i = 0;
+    uint32_t ret = 0;
+    uint8_t  byte = 0;
+
+    for(i = 3; i >= 0; i--)
+    {
+        byte = fgetc(i_fhndl);
+        if(EOF != byte)
+        {
+            ret |= (byte << (i*8));
+        }
+    }
+
+    return ret;
+}
+
+uint16_t get_uint16(FILE* i_fhndl)
+{
+    int      i = 0;
+    uint16_t ret = 0;
+    uint8_t  byte = 0;
+
+    for(i = 1; i >= 0; i--)
+    {
+        byte = fgetc(i_fhndl);
+        if(EOF != byte)
+        {
+            ret |= (byte << (i*8));
+        }
+    }
+
+    return ret;
+}
diff --git a/src/tools/ffdcparser/wofparser.c b/src/tools/ffdcparser/wofparser.c
new file mode 100644
index 0000000..3a6c88b
--- /dev/null
+++ b/src/tools/ffdcparser/wofparser.c
@@ -0,0 +1,388 @@
+/* IBM_PROLOG_BEGIN_TAG                                                   */
+/* This is an automatically generated prolog.                             */
+/*                                                                        */
+/* $Source: src/tools/ffdcparser/wofparser.c $                            */
+/*                                                                        */
+/* OpenPOWER OnChipController Project                                     */
+/*                                                                        */
+/* Contributors Listed Below - COPYRIGHT 2016,2018                        */
+/* [+] International Business Machines Corp.                              */
+/*                                                                        */
+/*                                                                        */
+/* Licensed under the Apache License, Version 2.0 (the "License");        */
+/* you may not use this file except in compliance with the License.       */
+/* You may obtain a copy of the License at                                */
+/*                                                                        */
+/*     http://www.apache.org/licenses/LICENSE-2.0                         */
+/*                                                                        */
+/* Unless required by applicable law or agreed to in writing, software    */
+/* distributed under the License is distributed on an "AS IS" BASIS,      */
+/* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or        */
+/* implied. See the License for the specific language governing           */
+/* permissions and limitations under the License.                         */
+/*                                                                        */
+/* IBM_PROLOG_END_TAG                                                     */
+#include <stdio.h>
+#include <stdint.h>
+#include <sys/stat.h>
+#include <string.h>
+#include "parser_common.h"
+
+// NOTE: This tool is to be used when FFDC is dumped by the OCC, and currently
+//       only accepts input files in binary format.
+
+void dump_wof_data(wof_data_t * data)
+{
+    uint32_t i = 0;
+    printf("Expected Data size %d\n", sizeof(wof_data_t));
+    printf("wof_disabled: 0x%08x\n", data->wof_disabled);
+    printf("version: %d\n", data->version);
+    printf("vfrt_block_size: %d\n", data->vfrt_block_size);
+    printf("vfrt_blck_hdr_sz: %d\n", data->vfrt_blck_hdr_sz);
+    printf("vfrt_data_size: %d\n", data->vfrt_data_size);
+    printf("active_quads_size: %d\n", data->active_quads_size);
+    printf("core_count: %d\n", data->core_count);
+    printf("vdn_start: %d\n", data->vdn_start);
+    printf("vdn_step: %d\n", data->vdn_step);
+    printf("vdn_size: %d\n", data->vdn_size);
+    printf("vdd_start: %d\n", data->vdd_start);
+    printf("vdd_step: %d\n", data->vdd_step);
+    printf("vdd_size: %d\n", data->vdd_size);
+    printf("vratio_start: %d\n", data->vratio_start);
+    printf("vratio_step: %d\n", data->vratio_step);
+    printf("vratio_size: %d\n", data->vratio_size);
+    printf("fratio_start: %d\n", data->fratio_start);
+    printf("fratio_step: %d\n", data->fratio_step);
+    printf("fratio_size: %d\n", data->fratio_size);
+    for( i = 0; i < 8; i++)
+        printf("vdn_percent[%d]: %d\n", i, data->vdn_percent[i]);
+    printf("socket_power_w: %d\n", data->socket_power_w);
+    printf("nest_freq_mhz: %d\n", data->nest_freq_mhz);
+    printf("nom_freq_mhz: %d\n", data->nom_freq_mhz);
+    printf("rdp_capacity: %d\n", data->rdp_capacity);
+    printf("wof_tbls_src_tag: 0x%X\n", data->wof_tbls_src_tag);
+    printf("package_name_hi: 0x%08x\n", data->package_name_hi);
+    printf("package_name_lo: 0x%08x\n", data->package_name_lo);
+    printf("vdd_step_from_start: %d\n", data->vdd_step_from_start);
+    printf("vdn_step_from_start: %d\n", data->vdn_step_from_start);
+    printf("quad_step_from_start: %d\n", data->quad_step_from_start);
+    for(i = 0; i < MAXIMUM_QUADS; i++)
+        printf("v_core_100uV[%d]: %d\n", i, data->v_core_100uV[i]);
+    printf("core_pwr_on: 0x%08X\n", data->core_pwr_on);
+    for(i = 0; i < MAXIMUM_QUADS; i++)
+        printf("cores_on_per_quad[%d]: %d\n", i, data->cores_on_per_quad[i]);
+    printf("voltvddsense_sensor: %d\n", data->voltvddsense_sensor);
+    for(i = 0; i < MAX_NUM_CORES; i++)
+        printf("tempprocthrmc[%d]: %d\n", i, data->tempprocthrmc[i]);
+    printf("tempnest_sensor: %d\n", data->tempnest_sensor);
+    for(i = 0; i < MAXIMUM_QUADS; i++)
+        printf("tempq[%d]: %d\n", i, data->tempq[i]);
+    printf("curvdd_sensor: %d\n", data->curvdd_sensor);
+    printf("curvdn_sensor: %d\n", data->curvdn_sensor);
+    printf("voltvdn_sensor: %d\n", data->voltvdn_sensor);
+    for(i = 0; i < MAXIMUM_QUADS; i++)
+        printf("quad_x_pstates[%d]: %d\n", i, data->quad_x_pstates[i]);
+    for(i = 0; i < MAXIMUM_QUADS; i++)
+        printf("quad_v_idx[%d]: %d\n", i, data->quad_v_idx[i]);
+    printf("quad_ivrm_states: %d\n", data->quad_ivrm_states);
+    printf("idc_vdd: %d\n", data->idc_vdd);
+    printf("idc_vdn: %d\n", data->idc_vdn);
+    printf("idc_quad %d\n", data->idc_quad);
+    printf("iac_vdd: %d\n", data->iac_vdd);
+    printf("iac_vdn: %d\n", data->iac_vdn);
+    printf("iac_tdp_vdd %d\n", data->iac_tdp_vdd);
+    printf("v_ratio: %d\n", data->v_ratio);
+    printf("f_ratio: %d\n", data->f_ratio);
+    printf("v_clip: %d\n", data->v_clip);
+    printf("f_clip_ps: 0x%x\n", data->f_clip_ps);
+    printf("f_clip_freq: %d\n", data->f_clip_freq);
+    printf("ceff_tdp_vdd: %d\n", data->ceff_tdp_vdd);
+    printf("ceff_vdd: %d\n", data->ceff_vdd);
+    printf("ceff_ratio_vdd: %d\n", data->ceff_ratio_vdd);
+    printf("ceff_tdp_vdn: %d\n", data->ceff_tdp_vdn);
+    printf("ceff_vdn: %d\n", data->ceff_vdn);
+    printf("ceff_ratio_vdn: %d\n", data->ceff_ratio_vdn);
+    printf("chip_volt_idx: %d\n", data->chip_volt_idx);
+    printf("all_cores_off_iso: %d\n", data->all_cores_off_iso);
+    printf("all_good_caches_on_iso: %d\n", data->all_good_caches_on_iso);
+    printf("all_caches_off_iso: %d\n", data->all_caches_off_iso);
+    for( i = 0; i < MAXIMUM_QUADS; i++)
+        printf("quad_good_cores_only[%d]: %d\n", i, data->quad_good_cores_only[i]);
+    for( i = 0; i < MAXIMUM_QUADS; i++)
+        printf("quad_on_cores[%d]: %d\n", i, data->quad_on_cores[i]);
+    for( i = 0; i < MAXIMUM_QUADS; i++)
+        printf("quad_bad_off_cores[%d]: %d\n", i, data->quad_bad_off_cores[i]);
+    printf("req_active_quad_update: 0x%x\n", data->req_active_quad_update);
+    printf("prev_req_active_quads: 0x%x\n", data->prev_req_active_quads);
+    printf("num_active_quads: %d\n", data->num_active_quads);
+    printf("curr_ping_pong_buf: 0x%08X\n", data->curr_ping_pong_buf);
+    printf("next_ping_pong_buf: 0x%08X\n", data->next_ping_pong_buf);
+    printf("curr_vfrt_main_mem_addr: 0x%08X\n", data->curr_vfrt_main_mem_addr);
+    printf("next_vfrt_main_mem_addr: 0x%08X\n", data->next_vfrt_main_mem_addr);
+    printf("vfrt_tbls_main_mem_addr: 0x%08X\n", data->vfrt_tbls_main_mem_addr);
+    printf("vfrt_tbls_len: 0x%08X\n", data->vfrt_tbls_len);
+    printf("wof_init_state: %d\n", data->wof_init_state);
+    printf("quad_state_0_addr: 0x%08x\n", data->quad_state_0_addr);
+    printf("quad_state_1_addr: 0x%08x\n", data->quad_state_1_addr);
+    printf("pgpe_wof_state_addr: 0x%08x\n", data->pgpe_wof_state_addr);
+    printf("req_active_quads_addr: 0x%08x\n", data->req_active_quads_addr);
+    printf("core_leakage_percent: %d\n", data->core_leakage_percent);
+    printf("pstate_tbl_sram_addr: 0x%08x\n", data->pstate_tbl_sram_addr);
+    printf("gpe_req_rc: 0x%x\n", data->gpe_req_rc);
+    printf("control_ipc_rc: 0x%x\n", data->control_ipc_rc);
+    printf("vfrt_callback_error: 0x%x\n", data->vfrt_callback_error);
+    printf("pgpe_wof_off: %d\n", data->pgpe_wof_off);
+    printf("pgpe_wof_disabled: %d\n", data->pgpe_wof_disabled);
+    printf("vfrt_mm_offset: %d\n", data->vfrt_mm_offset);
+    printf("wof_vfrt_req_rc: 0x%x\n", data->wof_vfrt_req_rc);
+    printf("c_ratio_vdd_volt: %d\n", data->c_ratio_vdd_volt);
+    printf("c_ratio_vdd_freq: %d\n", data->c_ratio_vdd_freq);
+    printf("c_ratio_vdn_volt: %d\n", data->c_ratio_vdn_volt);
+    printf("c_ratio_vdn_freq: %d\n", data->c_ratio_vdn_freq);
+    printf("vfrt_state: %d\n", data->vfrt_state);
+    printf("all_cores_off_before: %d\n", data->all_cores_off_before);
+    printf("good_quads_per_sort: %d\n", data->good_quads_per_sort);
+    printf("good_normal_cores_per_sort: %d\n", data->good_normal_cores_per_sort);
+    printf("good_caches_per_sort: %d\n", data->good_caches_per_sort);
+    for( i = 0; i < MAXIMUM_QUADS; i++)
+        printf("good_normal_cores[%d]: %d\n", i, data->good_normal_cores[i]);
+    for( i = 0; i < MAXIMUM_QUADS; i++)
+        printf("good_caches[%d]: %d\n", i, data->good_caches[i]);
+    for( i = 0; i < CORE_IDDQ_MEASUREMENTS; i++ )
+        printf("allGoodCoresCachesOn[%d]: %d\n",i, data->allGoodCoresCachesOn[i]);
+    for( i = 0; i < CORE_IDDQ_MEASUREMENTS; i++ )
+        printf("allCoresCachesOff[%d]: %d\n",i, data->allCoresCachesOff[i]);
+    for( i = 0; i < CORE_IDDQ_MEASUREMENTS; i++ )
+        printf("coresOffCachesOn[%d]: %d\n",i, data->coresOffCachesOn[i]);
+    for( i = 0; i < CORE_IDDQ_MEASUREMENTS; i++ )
+        printf("quad1CoresCachesOn[%d]: %d\n", i, data->quad1CoresCachesOn[i]);
+    for( i = 0; i < CORE_IDDQ_MEASUREMENTS; i++ )
+        printf("quad2CoresCachesOn[%d]: %d\n", i, data->quad2CoresCachesOn[i]);
+    for( i = 0; i < CORE_IDDQ_MEASUREMENTS; i++ )
+        printf("quad3CoresCachesOn[%d]: %d\n", i, data->quad3CoresCachesOn[i]);
+    for( i = 0; i < CORE_IDDQ_MEASUREMENTS; i++ )
+        printf("quad4CoresCachesOn[%d]: %d\n", i, data->quad4CoresCachesOn[i]);
+    for( i = 0; i < CORE_IDDQ_MEASUREMENTS; i++ )
+        printf("quad5CoresCachesOn[%d]: %d\n", i, data->quad5CoresCachesOn[i]);
+    for( i = 0; i < CORE_IDDQ_MEASUREMENTS; i++ )
+        printf("quad6CoresCachesOn[%d]: %d\n", i, data->quad6CoresCachesOn[i]);
+    for( i = 0; i < CORE_IDDQ_MEASUREMENTS; i++ )
+        printf("ivdn[%d]: %d\n", i, data->ivdn[i]);
+    for( i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        printf("allCoresCachesOnT[%d]: %d\n", i, data->allCoresCachesOnT[i]);
+    for( i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        printf("allCoresCachesOffT[%d]: %d\n", i, data->allCoresCachesOffT[i]);
+    for( i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        printf("coresOffCachesOnT[%d]: %d\n", i, data->coresOffCachesOnT[i]);
+    for( i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        printf("quad1CoresCachesOnT[%d]: %d\n", i , data->quad1CoresCachesOnT[i]);
+    for( i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        printf("quad2CoresCachesOnT[%d]: %d\n", i , data->quad2CoresCachesOnT[i]);
+    for( i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        printf("quad3CoresCachesOnT[%d]: %d\n", i , data->quad3CoresCachesOnT[i]);
+    for( i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        printf("quad4CoresCachesOnT[%d]: %d\n", i , data->quad4CoresCachesOnT[i]);
+    for( i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        printf("quad5CoresCachesOnT[%d]: %d\n", i , data->quad5CoresCachesOnT[i]);
+    for( i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        printf("quad6CoresCachesOnT[%d]: %d\n", i , data->quad6CoresCachesOnT[i]);
+    for(  i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        printf("avgtemp_vdn[%d]: %d\n",i, data->avgtemp_vdn[i]);
+}
+
+int main(int argc, char** argv)
+{
+    FILE*       wof_file = NULL;
+    wof_data_t  data = {0};
+    uint32_t    i = 0;
+
+    // Verify a file was passed as an argument
+    if(argc < 2)
+    {
+        fprintf(stderr, "ERROR: Requires a file with the binary WOF data\n");
+        return -1;
+    }
+    else
+    {
+        wof_file = fopen(argv[1], "rb");
+        if(wof_file == NULL)
+        {
+            fprintf(stderr, "ERROR: %s cannot be opened or does not exist\n", argv[1]);
+            return -1;
+        }
+    }
+
+    // Get file size
+    fseek(wof_file, 0, SEEK_END);
+    const unsigned int file_size = ftell(wof_file);
+    fseek(wof_file, 0, SEEK_SET);
+
+    // Sanity check
+    if(file_size < sizeof(wof_data_t))
+    {
+        fprintf(stderr, "WARNING: WOF data file size (%d) is less than what was "
+                "expected(%d)\n", file_size, sizeof(wof_data_t));
+    }
+
+    // Populate struct from file data
+    data.wof_disabled   = get_uint32(wof_file);
+    data.version        = fgetc(wof_file);
+    data.vfrt_block_size= get_uint16(wof_file);
+    data.vfrt_blck_hdr_sz = get_uint16(wof_file);
+    data.vfrt_data_size = get_uint16(wof_file);
+    data.active_quads_size = fgetc(wof_file);
+    data.core_count = fgetc(wof_file);
+    data.vdn_start = get_uint16(wof_file);
+    data.vdn_step = get_uint16(wof_file);
+    data.vdn_size = get_uint16(wof_file);
+    data.vdd_start = get_uint16(wof_file);
+    data.vdd_step = get_uint16(wof_file);
+    data.vdd_size = get_uint16(wof_file);
+    data.vratio_start = get_uint16(wof_file);
+    data.vratio_step = get_uint16(wof_file);
+    data.vratio_size = get_uint16(wof_file);
+    data.fratio_start = get_uint16(wof_file);
+    data.fratio_step = get_uint16(wof_file);
+    data.fratio_size = get_uint16(wof_file);
+    for( i = 0; i < 8; i++ )
+        data.vdn_percent[i] = get_uint16(wof_file);
+    data.socket_power_w = get_uint16(wof_file);
+    data.nest_freq_mhz = get_uint16(wof_file);
+    data.nom_freq_mhz = get_uint16(wof_file);
+    data.rdp_capacity = get_uint16(wof_file);
+    data.wof_tbls_src_tag = get_uint64(wof_file);
+    data.package_name_hi = get_uint64(wof_file);
+    data.package_name_lo = get_uint64(wof_file);
+    data.vdd_step_from_start = get_uint16(wof_file);
+    data.vdn_step_from_start = get_uint16(wof_file);
+    data.quad_step_from_start = fgetc(wof_file);
+    for(i = 0; i < MAXIMUM_QUADS; i++)
+        data.v_core_100uV[i] = get_uint32(wof_file);
+    data.core_pwr_on = get_uint32(wof_file);
+    for(i = 0; i < MAXIMUM_QUADS; i++)
+        data.cores_on_per_quad[i] = fgetc(wof_file);
+    data.voltvddsense_sensor = get_uint32(wof_file);
+    for(i = 0; i < MAX_NUM_CORES; i++)
+        data.tempprocthrmc[i] = get_uint16(wof_file);
+    data.tempnest_sensor = get_uint16(wof_file);
+    for(i = 0; i < MAXIMUM_QUADS; i++)
+        data.tempq[i] = get_uint16(wof_file);
+    data.curvdd_sensor = get_uint16(wof_file);
+    data.curvdn_sensor = get_uint16(wof_file);
+    data.voltvdn_sensor = get_uint16(wof_file);
+    for(i = 0; i < MAXIMUM_QUADS; i++)
+        data.quad_x_pstates[i] = fgetc(wof_file);
+    for(i = 0; i < MAXIMUM_QUADS; i++)
+        data.quad_v_idx[i] = fgetc(wof_file);
+    data.quad_ivrm_states = fgetc(wof_file);
+    data.idc_vdd = get_uint32(wof_file);
+    data.idc_vdn = get_uint32(wof_file);
+    data.idc_quad = get_uint32(wof_file);
+    data.iac_vdd = get_uint32(wof_file);
+    data.iac_vdn = get_uint32(wof_file);
+    data.iac_tdp_vdd = get_uint32(wof_file);
+    data.v_ratio = get_uint16(wof_file);
+    data.f_ratio = get_uint16(wof_file);
+    data.v_clip = get_uint16(wof_file);
+    data.f_clip_ps = fgetc(wof_file);
+    data.f_clip_freq = get_uint32(wof_file);
+    data.ceff_tdp_vdd = get_uint32(wof_file);
+    data.ceff_vdd = get_uint32(wof_file);
+    data.ceff_ratio_vdd = get_uint32(wof_file);
+    data.ceff_tdp_vdn = get_uint32(wof_file);
+    data.ceff_vdn = get_uint32(wof_file);
+    data.ceff_ratio_vdn = get_uint32(wof_file);
+    data.chip_volt_idx = fgetc(wof_file);
+    data.all_cores_off_iso = get_uint32(wof_file);
+    data.all_good_caches_on_iso = get_uint32(wof_file);
+    data.all_caches_off_iso = get_uint32(wof_file);
+    for(i = 0; i < MAXIMUM_QUADS; i++)
+        data.quad_good_cores_only[i] = get_uint32(wof_file);
+    for(i = 0; i < MAXIMUM_QUADS; i++)
+        data.quad_on_cores[i] = get_uint16(wof_file);
+    for(i = 0; i < MAXIMUM_QUADS; i++)
+        data.quad_bad_off_cores[i] = get_uint16(wof_file);
+    data.req_active_quad_update = fgetc(wof_file);
+    data.prev_req_active_quads = fgetc(wof_file);
+    data.num_active_quads = fgetc(wof_file);
+    data.curr_ping_pong_buf = get_uint32(wof_file);
+    data.next_ping_pong_buf = get_uint32(wof_file);
+    data.curr_vfrt_main_mem_addr = get_uint32(wof_file);
+    data.next_vfrt_main_mem_addr = get_uint32(wof_file);
+    data.vfrt_tbls_main_mem_addr = get_uint32(wof_file);
+    data.vfrt_tbls_len = get_uint32(wof_file);
+    data.wof_init_state = fgetc(wof_file);
+    data.quad_state_0_addr = get_uint32(wof_file);
+    data.quad_state_1_addr = get_uint32(wof_file);
+    data.pgpe_wof_state_addr = get_uint32(wof_file);
+    data.req_active_quads_addr = get_uint32(wof_file);
+    data.core_leakage_percent = get_uint16(wof_file);
+    data.pstate_tbl_sram_addr = get_uint32(wof_file);
+    data.gpe_req_rc = get_uint32(wof_file);
+    data.control_ipc_rc = get_uint32(wof_file);
+    data.vfrt_callback_error = fgetc(wof_file);
+    data.pgpe_wof_off = fgetc(wof_file);
+    data.pgpe_wof_disabled = fgetc(wof_file);
+    data.vfrt_mm_offset = get_uint32(wof_file);
+    data.wof_vfrt_req_rc = fgetc(wof_file);
+    data.c_ratio_vdd_volt = get_uint32(wof_file);
+    data.c_ratio_vdd_freq = get_uint32(wof_file);
+    data.c_ratio_vdn_volt = get_uint32(wof_file);
+    data.c_ratio_vdn_freq = get_uint32(wof_file);
+    data.vfrt_state = fgetc(wof_file);
+    data.all_cores_off_before = get_uint32(wof_file);
+    data.good_quads_per_sort = fgetc(wof_file);
+    data.good_normal_cores_per_sort = fgetc(wof_file);
+    data.good_caches_per_sort = fgetc(wof_file);
+    for(i = 0; i < MAXIMUM_QUADS; i++)
+        data.good_normal_cores[i] = fgetc(wof_file);
+    for(i = 0; i < MAXIMUM_QUADS; i++)
+        data.good_caches[i] = fgetc(wof_file);
+    for(i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        data.allGoodCoresCachesOn[i] = get_uint16(wof_file);
+    for(i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        data.allCoresCachesOff[i] = get_uint16(wof_file);
+    for(i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        data.quad1CoresCachesOn[i] = get_uint16(wof_file);
+    for(i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        data.quad2CoresCachesOn[i] = get_uint16(wof_file);
+    for(i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        data.quad3CoresCachesOn[i] = get_uint16(wof_file);
+    for(i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        data.quad4CoresCachesOn[i] = get_uint16(wof_file);
+    for(i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        data.quad5CoresCachesOn[i] = get_uint16(wof_file);
+    for(i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        data.quad6CoresCachesOn[i] = get_uint16(wof_file);
+    for(i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        data.ivdn[i]= get_uint16(wof_file);
+    for(i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        data.allCoresCachesOnT[i] = fgetc(wof_file);
+    for(i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        data.allCoresCachesOffT[i] = fgetc(wof_file);
+    for(i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        data.coresOffCachesOnT[i] = fgetc(wof_file);
+    for(i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        data.quad1CoresCachesOnT[i] = fgetc(wof_file);
+    for(i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        data.quad2CoresCachesOnT[i] = fgetc(wof_file);
+    for(i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        data.quad3CoresCachesOnT[i] = fgetc(wof_file);
+    for(i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        data.quad4CoresCachesOnT[i] = fgetc(wof_file);
+    for(i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        data.quad5CoresCachesOnT[i] = fgetc(wof_file);
+    for(i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        data.quad6CoresCachesOnT[i] = fgetc(wof_file);
+    for(i = 0; i < CORE_IDDQ_MEASUREMENTS; i++)
+        data.avgtemp_vdn[i] = fgetc(wof_file);
+
+    // Print the data to stdout
+    dump_wof_data(&data);
+
+    // Close the file
+    if(wof_file != NULL)
+        fclose(wof_file);
+
+    return 0;
+}