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* arm: socfpga: Add DW master SPI clock to clock_manager.cStefan Roese2014-11-071-0/+14
| | | | | | | | | | | | This function will be needed by the upcoming Designware master SPI driver. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Marek Vasut <marex@denx.de> Cc: Pavel Machek <pavel@denx.de>
* arm: socfpga: Add DT support for SoCFPGA and add socfpga_socrates targetStefan Roese2014-11-075-0/+868
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch includes the latest DT sources for socfpga from the current Linux kernel. And enables CONFIG_OF_CONTROL for the new build target "socfpga_socrates" (the EBV SoCrates board) to make use of this new DT support. Until this patch, the only SoCFPGA U-Boot target in mainline is "socfpga_cyclone5". This build target is not (yet) changed to support DT. So nothing changes for this target. Even though the long-term goal should be to move all SoCFPGA targets over to DT. One of the reasons to enable DT support in SoCFPGA is, that I need to support multiple different SPI controllers for this platform. This is the QSPI Cadence controller and the Designware SPI master controller. Both are implemented in the SoCFPGA. And enabling both controllers is only possible by using the new driver model (DM). The DM SPI code only supports DT based probing. So it was easier to move SoCFPGA to DT than to add the (deprecated) platform-data based probing to the DM SPI suport. Note that the image with the dtb embedded is u-boot-dtb.img. This needs to be used now for those DT enabled boards instead of u-boot.img. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Pavel Machek <pavel@denx.de> Cc: Simon Glass <sjg@chromium.org>
* arm: interrupt_init: set sp in IRQ/FIQ modesGeorges Savoundararadj2014-10-291-0/+27
| | | | | | | | | | | Before this commit, the stack addresses for IRQ and FIQ modes, IRQ_STACK_START and FIQ_STACK_START, were computed in interrupt_init but they were not used. This commit sets the stack pointers for IRQ and FIQ modes. Signed-off-by: Georges Savoundararadj <savoundg@gmail.com> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* arm: relocate the exception vectorsGeorges Savoundararadj2014-10-292-6/+30
| | | | | | | | | | | This commit relocates the exception vectors. As ARM1176 and ARMv7 have the security extensions, it uses VBAR. For the other ARM processors, it copies the relocated exception vectors to the correct address: 0x00000000 or 0xFFFF0000. Signed-off-by: Georges Savoundararadj <savoundg@gmail.com> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Tom Warren <twarren@nvidia.com>
* arm: make .vectors section allocatableGeorges Savoundararadj2014-10-291-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | A regression was introduced in commit 41623c91. The consequence of that is the non-relocation of the section .vectors symbols : _undefined_instruction, _software_interrupt, _prefetch_abort, _data_abort, _not_used, _irq and _fiq. Before commit 41623c91, the exception vectors were in a .text section. The .text section has the attributes allocatable and executable [1]. In commit 41623c91, a specific section is created, called .vectors, with the attribute executable only. What have changed between commit 41623c91^ and 41623c91 is the attribute of the section which contains the exception vectors. An allocatable section is "a section [that] occupies memory during process execution" [1] which is the case of the section .vectors. Adding the lacking attribute (SHF_ALLOC or "a") for the definition of the section .vectors fixed the issue. To summarize, the fix has to mark .vectors as allocatable because the exception vectors reside in "memory during execution" and they need to be relocated. [1] http://man7.org/linux/man-pages/man5/elf.5.html Signed-off-by: Georges Savoundararadj <savoundg@gmail.com> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* kconfig: arm: introduce symbol for ARM CPUsGeorges Savoundararadj2014-10-2916-48/+212
| | | | | | | | | | | | | | | | | This commit introduces a Kconfig symbol for each ARM CPU: CPU_ARM720T, CPU_ARM920T, CPU_ARM926EJS, CPU_ARM946ES, CPU_ARM1136, CPU_ARM1176, CPU_V7, CPU_PXA, CPU_SA1100. Also, it adds the CPU feature Kconfig symbol HAS_VBAR which is selected for CPU_ARM1176 and CPU_V7. For each target, the corresponding CPU is selected and the definition of SYS_CPU in the corresponding Kconfig file is removed. Also, it removes redundant "string" type in some Kconfig files. Signed-off-by: Georges Savoundararadj <savoundg@gmail.com> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
* i2c: designware: Convert driver to multibus/multiadapter frameworkStefan Roese2014-10-291-1/+1
| | | | | | | | | | | | | | | | | | | | | In preparation for the SoCFPGA support of the designware I2C driver, convert this driver to the common CONFIG_SYS_I2C framework. This patch converts all users of this driver, this is: - ST spearxxx boards - AXS101 (ARC700 platform) I couldn't test this patch on those boards. Only compile tested for all spear boards. And tested on SoCFPGA. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Marek Vasut <marex@denx.de> Acked-by: Alexey Brodkin <abrodkin@synopsys.com> Tested-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Heiko Schocher <hs@denx.de> Cc: Vipin Kumar <vk.vipin@gmail.com> Cc: Jeroen Hofstee <jeroen@myspectrum.nl>
* ppc/arm: zap EMK boardsWolfgang Denk2014-10-283-3/+0
| | | | | | | | | | | | | | The following bard configurations have been without active maintenance for a long time, and the board maintainer agrees to have them removed: MPC5200: TOP5200, MINI5200, EVAL5200 MPC860: TOP860 at91sam9xeXXX: top9000eval_xe, top9000su_xe Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Reinhard Meyer <reinhard.meyer@emk-elektronik.de> [trini: Add missing Kconfig removals] Signed-off-by: Tom Rini <trini@ti.com>
* odroid: dts: fix name of included dtsiPrzemyslaw Marczak2014-10-271-1/+1
| | | | | | | Odroid is based on Exynos4412. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* odroid: dts: adjust sd cd-gpios for SD CardPrzemyslaw Marczak2014-10-271-1/+1
| | | | | | | | There is no gaps in exynos gpio enum after rework, so the gpio numbers should be adjusted to the new numbering. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* trats2: dts: adjust gpio numbers after gpio reworkPrzemyslaw Marczak2014-10-271-3/+3
| | | | | | | | There is no gaps in exynos gpio enum after rework, so the gpio numbers should be adjusted to the new numbering. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* trats: dts: adjust gpio numbers to new apiPrzemyslaw Marczak2014-10-271-2/+2
| | | | | | | | There is no gaps in exynos gpio enum after rework, so the gpio numbers should be adjusted to the new numbering. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* universal: dts: adjust gpio numbers to new apiPrzemyslaw Marczak2014-10-271-2/+2
| | | | | | | | There is no gaps in exynos gpio enum after rework, so the gpio numbers should be adjusted to the new numbering. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* exynos4210: dts: fix gpio offset in pinctrl-ubootPrzemyslaw Marczak2014-10-271-1/+1
| | | | | | | | The gpy0 don't need any additional register offset, but the gpx0 does, so now it is fixed. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* exynos4412: dts: adjust pinctrl-uboot to changed gpio orderPrzemyslaw Marczak2014-10-271-4/+1
| | | | | | | | The gpf0 offset was bad and it's now fixed. After fix gpio order in *pinctrl.dts , the gpy0 offset is not required now. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* exynos4412: dts: fix bad gpio order in pinctrlPrzemyslaw Marczak2014-10-271-27/+27
| | | | | | | | | The pinctrl dts was imported from the kernel, but the order of GPM and GPY is wrong. The gpio enum in: asm/arch/gpio.h is proper. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
* kconfig: add CONFIG_SUPPORT_TPLMasahiro Yamada2014-10-271-0/+5
| | | | | | | | CONFIG_TPL should not be enabled for boards that do not have TPL. CONFIG_SUPPORT_TPL introduced by this commit should be "select"ed by boards with TPL support and CONFIG_TPL should depend on it. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* kconfig: add CONFIG_SUPPORT_SPLMasahiro Yamada2014-10-279-0/+91
| | | | | | | | | CONFIG_SPL should not be enabled for boards that do not have SPL. CONFIG_SUPPORT_SPL introduced by this commit should be "select"ed by boards with SPL support and CONFIG_SPL should depend on it. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* Rename some defines containing FAT in their name to be filesystem genericGuillaume GARDET2014-10-276-7/+7
| | | | | | | | | | | Rename some defines containing FAT in their name to be filesystem generic: MMCSD_MODE_FAT => MMCSD_MODE_FS CONFIG_SPL_FAT_LOAD_ARGS_NAME => CONFIG_SPL_FS_LOAD_ARGS_NAME CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME => CONFIG_SPL_FS_LOAD_PAYLOAD_NAME CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION => CONFIG_SYS_MMC_SD_FS_BOOT_PARTITION Signed-off-by: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Tom Rini <trini@ti.com>
* x86: Use correct printf() format string for uintptr_tSimon Glass2014-10-271-1/+2
| | | | | | Use the inttypes header file to provide this. Signed-off-by: Simon Glass <sjg@chromium.org>
* Provide option to avoid defining a custom version of uintptr_t.Gabe Black2014-10-272-0/+10
| | | | | | | | | | | | | | | | | | There's a definition in stdint.h (provided by gcc) which will be more correct if available. Define CONFIG_USE_STDINT to use this feature, or USE_STDINT=1 on the 'make' commmand. This adjusts the settings for x86 and sandbox, with both have 64-bit options. Signed-off-by: Gabe Black <gabeblack@google.com> Reviewed-by: Gabe Black <gabeblack@chromium.org> Tested-by: Gabe Black <gabeblack@chromium.org> Reviewed-by: Bill Richardson <wfrichar@google.com> Rewritten to be an option, since stdint.h is often available only in glibc. Changed to preserve a clear boundary between stdint and non-stdint Signed-off-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxxTom Rini2014-10-2714-162/+5
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| * ppc: Zap TQM8272 boardMarek Vasut2014-10-272-6/+0
| | | | | | | | | | | | | | | | | | | | | | This board is old and is using CONFIG_I2C_X, which is wrong. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de>
| * ppc: Zap TQM8260 boardMarek Vasut2014-10-271-4/+0
| | | | | | | | | | | | | | | | | | | | | | This board is old and is using CONFIG_I2C_X, which is wrong. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de>
| * ppc: Zap IDS8247 boardMarek Vasut2014-10-271-4/+0
| | | | | | | | | | | | | | | | | | | | | | This board is old and is using CONFIG_I2C_X, which is wrong. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de>
| * ppc: Zap HWW1U1A boardMarek Vasut2014-10-271-4/+0
| | | | | | | | | | | | | | | | | | | | | | This is the only used of CONFIG_SPI_X macro, just zap this. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de>
| * ppc: Zap Hymod boardMarek Vasut2014-10-276-67/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove this board as this is the only one last user of eeprom_probe(), which is pretty non-standard stuff. This patch also removes all the PHP, SQL and CSS stuff from U-Boot, which probably makes U-Boot a bit less IoT ;-) Signed-off-by: Marek Vasut <marex@denx.de> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de>
| * ppc: Zap MHPC boardMarek Vasut2014-10-272-5/+0
| | | | | | | | | | | | | | | | | | | | | | | | This board uses eeprom accessors in an incorrect way. The board is old and unsupported, just zap it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de>
| * ppc: Zap ICU862 boardMarek Vasut2014-10-273-44/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | This board is the only user of CONFIG_SYS_EEPROM_X40430 , remove it so the EEPROM command code can be cleansed of the related code as well. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Heiko Schocher <hs@denx.de>
| * PowerPC: drop some 74xx_7xx boards and related codeWolfgang Denk2014-10-272-28/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The file board/Marvell/include/mv_gen_reg.h is incompatible with the GPL (see for example the "MARVELL RESERVES THE RIGHT AT ITS SOLE DISCRETION TO REQUEST THAT THIS CODE BE IMMEDIATELY RETURNED TO MARVELL" clause). As this cannot be fixed, we remove the file and all code that depends on it. Fortunately this only affects some very old boards that have long reached EOL: CPCI750 DB64360 DB64460 p3m750 p3m7448 Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com> Cc: Stefan Roese <sr@denx.de> Cc: Roger Meier <r.meier@siemens.com>
| * powerpc: mpc512x: fix boot breakageAnatolij Gustschin2014-10-271-0/+1
| | | | | | | | | | | | | | | | Commit d6b11fd1 (powerpc: remove MBX and MBX860T boards support) removed mbxbar field in "struct sysconf512x" by mistake and broke booting on mpc5121 boards. Fix it. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-imxTom Rini2014-10-275-4/+27
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| * | ARM: i.MX video: declare displays and display_count publiclyEric Nelson2014-10-212-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | Declare displays[] and display_count in imx-common/video.h to prevent "Should it be static?" messages when compiling board files with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
| * | ARM: i.MX: provide declaration for board_spi_cs_gpioEric Nelson2014-10-211-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | Provide a public declaration of the board_spi_cs_gpio() callback for i.MX SPI chip selects to prevent the warning "Should it be static?" when compiling with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
| * | ARM: i.MX6: include prototype for get_board_rev()Eric Nelson2014-10-211-0/+1
| | | | | | | | | | | | | | | | | | | | | Include <asm/bootm.h> to see the prototype for get_board_rev() and prevent warning "Should it be static?" with "make C=1". Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
| * | ARM: prevent compiler warnings from bootm.cEric Nelson2014-10-211-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Without preceding declarations, "make C=1" generates "Should it be static?" warnings for symbols do_bootm_linux, boot_prep_vxworks, and boot_jump_vxworks Include of bootm.h also identified a signature mismatch (const on argv[]). Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | | Merge branch 'master' of git://git.denx.de/u-boot-tiTom Rini2014-10-2731-771/+1624
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| * | | omap3/am33xx: mux: fix several checkpatch issuesIgor Grinberg2014-10-232-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the following checkpatch issues: CHECK: No space is necessary after a cast \#39: FILE: arch/arm/include/asm/arch-am33xx/mux.h:39: +#define PAD_CTRL_BASE 0x800 +#define OFFSET(x) (unsigned int) (&((struct pad_signals *) \ CHECK: Avoid CamelCase: <CONTROL_PADCONF_JTAG_nTRST> \#284: FILE: arch/arm/include/asm/arch-omap3/mux.h:284: +#define CONTROL_PADCONF_JTAG_nTRST 0x0A1C ERROR: space required after that ',' (ctx:VxV) \#446: FILE: arch/arm/include/asm/arch-omap3/mux.h:446: +#define MUX_VAL(OFFSET,VALUE)\ ^ Cc: Raphael Assenat <raph@8d.com> Cc: Ilya Yanok <yanok@emcraft.com> Cc: Vaibhav Hiremath <hvaibhav@ti.com> Cc: Peter Barada <peter.barada@logicpd.com> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Stefan Roese <sr@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Nishanth Menon <nm@ti.com> Cc: Tom Rini <trini@ti.com> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Stefan Roese <sr@denx.de>
| * | | omap3: Kconfig: fix the cm-t35 board option promptIgor Grinberg2014-10-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The cm-t35 board support covers both cm-t3530 and cm-t3730 boards. Mention both boards in the Kconfig option prompt. Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
| * | | ARM: keystone: cmd_ddr3: add ddr3 commands to test ddrHao Zhang2014-10-232-1/+249
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add ddr3 commands: test <start_addr in hex> <end_addr in hex> - test DDR from start\n address to end address\n ddr compare <start_addr in hex> <end_addr in hex> <size in hex> -\n compare DDR data of (size) bytes from start address to end address\n ddr ecc_err <addr in hex> <bit_err in hex> - generate bit errors\n in DDR data at <addr>, the command will read a 32-bit data\n from <addr>, and write (data ^ bit_err) back to <addr>\n Delete CONFIG_MAX_UBOOT_MEM_SIZE, as it was supposed to be used for ddr3 commands and for now it's not needed any more. Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | | keystone2: ecc: add ddr3 error detection and correction supportVitaly Andrianov2014-10-234-0/+300
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the DDR3 ECC support to enable ECC in the DDR3 EMIF controller for Keystone II devices. By default, ECC will only be enabled if RMW is supported in the DDR EMIF controller. The entire DDR memory will be scrubbed to zero using an EDMA channel after ECC is enabled and before u-boot is re-located to DDR memory. An ecc_test environment variable is added for ECC testing. If ecc_test is set to 0, a detection of 2-bit error will reset the device, if ecc_test is set to 1, 2-bit error detection will not reset the device, user can still boot the kernel to check the ECC error handling in kernel. Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | | ARM: keystone: msmc: extend functionality of SESVitaly Andrianov2014-10-233-0/+60
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add functions to set/get SES PMAX values of Pivilege ID pair. Also add msmc module definitions. Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | | dma: ti-edma3: introduce edma3 driverKhoronzhuk, Ivan2014-10-231-0/+121
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The EDMA3 controller’s primary purpose is to service data transfers that you program between two memory-mapped slave endpoints on the device. Typical usage includes, but is not limited to the following: - Servicing software-driven paging transfers (e.g., transfers from external memory, such as SDRAM to internal device memory, such as DSP L2 SRAM) - Servicing event-driven peripherals, such as a serial port - Performing sorting or sub-frame extraction of various data structures - Offloading data transfers from the main device DSP(s) - See the device-specific data manual for specific peripherals that are accessible via the EDMA3 controller Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | | ARM: keystone: clock: add support for K2E SoCsKhoronzhuk, Ivan2014-10-232-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For K2E and K2L SoCs clock output from PASS PLL has to be enabled after NETCP domain and PA module are enabled. So create new function for that and call it after PA module is enabled. Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | | net: keystone_net: add Keystone2 K2E SoC supportKhoronzhuk, Ivan2014-10-231-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Keystone2 Edison SoC uses the same keystone net driver. This patch adds opportunity to use it by K2E SoCs. Acked-by: Vitaly Andrianov <vitalya@ti.com> Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | | net: keystone_serdes: add keystone K2E SoC supportKhoronzhuk, Ivan2014-10-231-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Keystone2 Edison SoC uses the same keystone SerDes driver. This patch adds support for K2E SoCs. Acked-by: Vitaly Andrianov <vitalya@ti.com> Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | | ARM: keystone2: keysonte_nav: add support for K2E SoCKhoronzhuk, Ivan2014-10-231-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Keystone2 Edison SoC uses the same keystone navigator, but uses different NETCP PktDMA definitions. This patch adds required definitions. Acked-by: Vitaly Andrianov <vitalya@ti.com> Acked-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | | net: keystone_net: register eth PHYs on MDIO busKhoronzhuk, Ivan2014-10-231-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As MDIO bus has been added we can register PHYs with it. After registration, the PHY driver will be probed according to the hardware on board. Startup PHY at the ethernet open. Use phy_startup() instead of keystone_get_link_status() when eth open, as it verifies PHY link inside and SGMII link is checked before. For K2HK evm PHY configuration at init was absent, so don't enable phy config at init for k2hk evm. Acked-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | | soc: keystone_serdes: generalize to be used by other sub systemsHao Zhang2014-10-231-1/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SerDes driver is used by other sub systems like PCI, sRIO etc. So modify it to be more general. The SerDes driver provides common API's that can also be extended for other peripherals SerDes configurations. Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
| * | | soc: keystone_serdes: enhance to use cmu/comlane/lane specific configurationsHao Zhang2014-10-232-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Enhance the driver to use cmu/comlane/lane specific configurations instead of 1 big array of configuration. Signed-off-by: Hao Zhang <hzhang@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
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