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* malta: IDE supportPaul Burton2015-01-291-0/+5
* MIPS: clear TagLo select 2 during cache initPaul Burton2015-01-291-2/+8
* MIPS: allow systems to skip loads during cache initPaul Burton2015-01-292-6/+19
* MIPS: inline mips_init_[id]cache functionsPaul Burton2015-01-291-58/+28
* MIPS: refactor cache loops to a macroPaul Burton2015-01-291-17/+13
* MIPS: refactor L1 cache config reads to a macroPaul Burton2015-01-291-56/+41
* MIPS: unify cache initialization codePaul Burton2015-01-295-224/+15
* MIPS: unify cache maintenance functionsPaul Burton2015-01-294-167/+119
* MIPS: avoid .set ISA for cache operationsPaul Burton2015-01-293-38/+33
* Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2015-01-2619-145/+535
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| * x86: ivybridge: Drop the Kconfig MRC cache informationSimon Glass2015-01-241-28/+0
| * x86: config: Enable hook for saving MRC configurationSimon Glass2015-01-241-0/+5
| * x86: Implement a cache for Memory Reference Code parametersSimon Glass2015-01-245-0/+464
| * x86: dts: Add SPI flash MRC details for chromebook_linkSimon Glass2015-01-241-1/+14
| * x86: Use ipchecksum from net/Simon Glass2015-01-244-97/+4
| * x86: Fix various code format issues in start16.SBin Meng2015-01-231-10/+10
| * x86: Test mtrr support flag before accessing mtrr msrBin Meng2015-01-233-2/+19
| * x86: Save mtrr support flag in global dataBin Meng2015-01-232-6/+14
| * x86: Add missing DECLARE_GLOBAL_DATA_PTR for mtrr.cBin Meng2015-01-231-0/+2
| * x86: Fix out of bounds irq handlers accessSebastien Ronsse2015-01-231-1/+1
| * x86: Support ROMs on other archsSimon Glass2015-01-231-0/+2
* | Merge branch 'master' of git://git.denx.de/u-boot-atmelTom Rini2015-01-264-1/+21
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| * | ARM: atmel: sama5d4: add usb device initial codeBo Shen2015-01-191-0/+16
| * | ARM: atmel: sama5d4: add usb platform dataBo Shen2015-01-191-1/+1
| * | arm, arm926ejs: make thumb mode compileableHeiko Schocher2015-01-192-0/+4
* | | Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblazeTom Rini2015-01-268-5/+51
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| * | | ARM: zynq: List qspi, smc and nand baseaddressesMichal Simek2015-01-261-0/+3
| * | | ARM: zynq: List nand, qspi and jtag boot modesMichal Simek2015-01-262-0/+11
| * | | ARM: zynq: slcr: Dont modify the reserved bitsSiva Durga Prasad Paladugu2015-01-261-1/+1
| * | | ARM: zynq: ddrc: Setup half of memory only for ECC caseMichal Simek2015-01-261-0/+2
| * | | ARM: zynq: Remove empty lineMichal Simek2015-01-261-1/+0
| * | | ARM: zynq: Enable the Neon instructionsMichal Simek2015-01-264-3/+34
* | | | Merge branch 'master' of git://git.denx.de/u-boot-marvellTom Rini2015-01-251-3/+8
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| * | | | ARM: kirkwood: fix cpu info for 6282 device idLuka Perkov2015-01-251-3/+8
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* | | | fsl/ls1021qds: Add deep sleep supporttang yuantian2015-01-241-0/+19
* | | | ls102xa: fdt: Disable QSPI and DSPI in NOR/NAND/SD bootAlison Wang2015-01-232-0/+17
* | | | arm: ls102xa: Update snoop settings for CCI-400Alison Wang2015-01-231-0/+2
* | | | ARM: HYP/non-sec: Make variable gic_dist_addr as a local onetang yuantian2015-01-231-2/+7
* | | | crypto/fsl: Add fixup for crypto nodeRuchika Gupta2015-01-233-170/+18
* | | | arm: ls102xa: Add dummy gpio.h to enable CONFIG_OF_CONTROLRuchika Gupta2015-01-231-0/+15
* | | | ls102xa: etsec: Select ge0_clk125 for eTSEC clock muxing as defaultAlison Wang2015-01-231-0/+2
* | | | arm/ls1021a: Add workaround for DDR erratum A008378York Sun2015-01-231-0/+1
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* | | powerpc: remove icecube_5200, Lite5200, cpci5200, mecp5200, pf5200Masahiro Yamada2015-01-232-30/+0
* | | powerpc: mpc5xxx: PM520 board supportMasahiro Yamada2015-01-231-4/+0
* | | powerpc: mpc5xxx: remove Total5200 board supportMasahiro Yamada2015-01-231-4/+0
* | | powerpc: ppc4xx: remove PPChameleonEVB, CATcenter boardsMasahiro Yamada2015-01-231-7/+0
* | | powerpc: mpc85xx: remove P2020DS board supportMasahiro Yamada2015-01-231-4/+0
* | | powerpc: mpc85xx: remove P2020COME board supportMasahiro Yamada2015-01-231-4/+0
* | | powerpc: mpc85xx: remove P1_P2_RDB boardsMasahiro Yamada2015-01-231-6/+0
* | | powerpc: mpc83xx: remove MPC8360ERDK, EMPC8360EMDS supportMasahiro Yamada2015-01-231-8/+0
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