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* Add more SPDX-License-Identifier tagsTom Rini2016-01-1946-492/+46
| | | | | | | | | In a number of places we had wordings of the GPL (or LGPL in a few cases) license text that were split in such a way that it wasn't caught previously. Convert all of these to the correct SPDX-License-Identifier tag. Signed-off-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2016-01-1645-1005/+2361
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| * MIPS: implement bit manipulating I/O accessorsDaniel Schwierzeck2016-01-161-0/+55
| | | | | | | | | | | | | | Add support for functions clrbits_X(), setbits_X() and clrsetbits_X() on MIPS. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: fix SPDX license identifier in remaining arch header filesDaniel Schwierzeck2016-01-1614-55/+32
| | | | | | | | | | | | | | Add a SPDX license identifier to MIPS header files where it is still missing. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: sync processor and register definitions with linux-4.4Daniel Schwierzeck2016-01-168-553/+1211
| | | | | | | | | | | | | | Update definitions for processor, registers as well as assemby macros. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: sync I/O related header files with linux-4.4Daniel Schwierzeck2016-01-1610-364/+941
| | | | | | | | | | | | | | | | | | | | | | | | | | Mainly sync asm/io.h to get a working ioremap() implementation as well as the full set of I/O accessors. Pull in additional header files to make this work. Furthermore port over the directory 'arch/mips/include/asm/mach-generic/' with contains default definitions for I/O and memory spaces and default implementations for mapping those spaces. All files in that directory can be overwritten by a SoC/machine. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: kconfig: add option for MIPS_L1_CACHE_SHIFTDaniel Schwierzeck2016-01-162-10/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Kconfig symbol for L1 cache shift like the kernel does. The value of CONFIG_SYS_CACHELINE_SIZE is not a reliable source for ARCH_DMA_MINALIGN anymore, because it is optional on MIPS. If CONFIG_SYS_CACHELINE_SIZE is not defined by a board, the cache sizes are automatically detected and ARCH_DMA_MINALIGN would be set to 128 Bytes. The default value for CONFIG_MIPS_L1_CACHE_SHIFT is 5 which corresponds to 32 Bytes. All current MIPS boards already used that value. While on it, fix the Malta board to use a value of 6 like the kernel port does. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: Kconfig: optimize gcc -march and -mtune setupDaniel Schwierzeck2016-01-164-15/+24
| | | | | | | | | | | | | | | | Move setup of -march to arch/mips/Makefile and follow the design on ARM. Also add a possibility to chose specific CPU tune options. Signed-off-by: Wills Wang <wills.wang@live.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: au1x00: move SoC header files to arch/mips/mach-au1x00/include/mach/Daniel Schwierzeck2016-01-164-3/+3
| | | | | | | | Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: Kconfig: refactor machine setupDaniel Schwierzeck2016-01-161-1/+6
| | | | | | | | | | | | | | | | Refactor machine setup like it is done on ARM. While on it, also support "include <mach/file.h" for machine specific header files. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: add initial infrastructure for device-tree filesDaniel Schwierzeck2016-01-166-0/+43
| | | | | | | | | | | | | | | | Prepare sub-folder for device-tree files. Make support for device-tree on MIPS available in Kbuild/Kconfig. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
| * MIPS: do not build position-independent executables for SPLDaniel Schwierzeck2016-01-161-4/+14
| | | | | | | | | | | | | | | | | | SPL binaries are usually linked to a fixed address in SRAM. Furthermore SPL binaries do not need to relocate itself. Thus do not build them as position-independent binaries which helps to largely reduce the size of SPL binaries. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: create .text sub-sections for assembler functionsDaniel Schwierzeck2016-01-161-1/+3
| | | | | | | | | | | | | | | | Put all functions coded in assembly in sub-sections of section .text. This allows the linker to garbage collect unused assembly functions too. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: fix annotation of _start and relocate_codeDaniel Schwierzeck2016-01-162-7/+11
| | | | | | | | | | | | | | Correctly annotate _start and relocate_code as functions to produce more readable disassembly code generated by objdump. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * MIPS: add asm/gpio.h to fix compilation error with CONFIG_CMD_GPIO.Purna Chandra Mandal2016-01-161-0/+1
| | | | | | | | | | | | | | | | | | | | With CONFIG_CMD_GPIO compilation reports error. common/cmd_gpio.c:13:22: fatal error: asm/gpio.h: No such file or directory #include <asm/gpio.h> ^ Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Chin Liang See <clsee@altera.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | socfpga: Modify qts-filter args to allow input for bsp generated files and ↵Dalon Westergreen2016-01-161-31/+45
|/ | | | | | | | | | | | quartus project directories The hps_isw_handoff and bsp/generated folders are typically not in the same path.This patch adds support for specifying the different input directories for the bsp and quartus projects. Signed-off-by: Dalon Westergreen <dwesterg@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Chin Liang See <clsee@altera.com>
* eth-raw-os.c: Add cast to bind(2) callTom Rini2016-01-151-1/+2
| | | | | | | | | | | | | | With more recent gcc versions we otherwise get an error like: note: expected 'const struct sockaddr *' but argument is of type 'struct sockaddr_in *' and the common solution here is to cast, rather than re-work the code. Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* Fix GCC format-security errors and convert sprintfs.Ben Whitten2016-01-145-6/+6
| | | | | | | | | | | With format-security errors turned on, GCC picks up the use of sprintf with a format parameter not being a string literal. Simple uses of sprintf are also converted to use strcpy. Signed-off-by: Ben Whitten <ben.whitten@gmail.com> Acked-by: Wolfgang Denk <wd@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2016-01-1424-101/+3092
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| * x86: qemu: remove cpu node in device treeMiao Yan2016-01-132-14/+0
| | | | | | | | | | | | | | | | | | Remove 'cpu' node in device tree for QEMU targets, and let U-Boot detect and fix up those information at runtime. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: qemu: fix cpu device in smp bootMiao Yan2016-01-132-11/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, when booting with more that one CPU enabled, U-Boot scans 'cpu' node in device tree and calculates CPU number. This does not scale well as changing CPU number also requires modifying .dts and re-compiling U-Boot. This patch uses fw_cfg interface provided by QEMU to detect online CPU number at runtime, and dynamically adds 'cpu' device to U-Boot's driver model. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: use actual CPU number for allocating memoryMiao Yan2016-01-131-3/+3
| | | | | | | | | | | | | | | | | | | | Use actual CPU number, instead of maximum cpu configured, to allocate stack memory in 'load_sipi_vector' Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: fix a typo in function nameMiao Yan2016-01-131-3/+3
| | | | | | | | | | | | | | | | | | Rename 'find_cpu_by_apid_id' to 'find_cpu_by_apic_id'. This should be a typo. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: qemu: add a cpu uclass driver for qemu targetMiao Yan2016-01-134-5/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a cpu uclass driver for qemu. Previously, the qemu target gets cpu number from board dts files, which are manually created at compile time. This does not scale when more cpus are assigned to guest as the dts files must be modified as well. This patch adds a cpu uclass driver for qemu targets to directly read online cpu number from firmware. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: qemu: add fw_cfg supportMiao Yan2016-01-134-1/+380
| | | | | | | | | | | | | | | | | | | | | | | | | | The QEMU fw_cfg interface allows the guest to retrieve various data information from QEMU. For example, APCI/SMBios tables, number of online cpus, kernel data and command line, etc. This patch adds support for QEMU fw_cfg interface. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * x86: ivybridge: Add macros for LPC decode rangesBin Meng2016-01-131-0/+10
| | | | | | | | | | | | | | | | Add several macros for LPC decode registers on PCH. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
| * x86: fsp: Always use hex numbers in the hob command outputBin Meng2016-01-131-2/+2
| | | | | | | | | | | | | | | | | | In the 'fsp hob' command output, decimal numbers and hexadecimal numbers are used mixedly. Now change to always use hex numbers to keep consistency. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * x86: ivybridge: Do not require HAVE_INTEL_MEBin Meng2016-01-131-1/+0
| | | | | | | | | | | | | | | | | | Do not set HAVE_INTEL_ME by default as for some cases Intel ME firmware even does not reside on the same SPI flash as U-Boot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
| * x86: ivybridge: Add microcode blobs for all the steppingsBin Meng2016-01-134-0/+2472
| | | | | | | | | | | | | | | | | | | | | | This adds microcode blobs created from Intel FSP package for the Chief River platform. They are for all the Ivy Bridge steppings: 306a2 (B0), 306a4 (C0), 306a5 (K0/M0), 306a8 (E0/L0), except the 306a9 which is already in the U-Boot tree. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
| * x86: fsp: Set up init runtime buffer in update_fsp_configs()Bin Meng2016-01-134-9/+18
| | | | | | | | | | | | | | | | | | fsp_init() runtime buffer parameter might be different across different platforms. Move this to update_fsp_configs(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
| * x86: fsp: Move struct fspinit_rtbuf definition to chipset headerBin Meng2016-01-134-16/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | All FSP spec v1.0 complaint FSP binary uses struct fspinit_rtbuf as defined by the 1.0 spec, however there are FSPs that does not follow 1.0 spec (possible due to that FSP predates the 1.0 spec), and future FSP binary that is complaint to v1.1 spec defines an optional paltform-specific runtime data in the struct fspinit_rtbuf. Hence move the definition to chipset header. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
| * x86: queensbay: Remove invalid comments in update_fsp_configs()Bin Meng2016-01-131-6/+0
| | | | | | | | | | | | | | | | Those comments in update_fsp_configs() are not correct. Remove them. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
| * x86: fsp: Introduce CONFIG_FSP_USE_UPD Kconfig optionBin Meng2016-01-132-9/+23
| | | | | | | | | | | | | | | | | | | | Not every FSP supports UPD, thus we introduce a Kconfig option CONFIG_FSP_USE_UPD and use it to wrap these common UPD handling codes in fsp_support.c. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
| * x86: fsp: Rename update_fsp_upd() and change its signatureBin Meng2016-01-134-12/+13
| | | | | | | | | | | | | | | | | | | | | | To support platform-specific configurations (might not always be UPD on some platform), use a better name update_fsp_configs() and accepct struct fsp_config_data as its parameter so that platform codes can handle whatever configuration data for that FSP. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
| * x86: fsp: Rename shared_data to fsp_config_dataBin Meng2016-01-135-12/+46
| | | | | | | | | | | | | | | | | | | | | | | | FSP has several config data like UPD, HDA verb table which can be overridden or provided by bootloader. Currently in U-Boot only UPD is handled via struct shared_data. To accommodate any platform, we rename shared_data to fsp_config_data and move the definition from common place fsp_support.h to platform-specific place fsp_configs.h. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
| * x86: fsp: Add boot_mode as a member of struct shared_dataBin Meng2016-01-132-0/+2
| | | | | | | | | | | | | | | | Save boot_mode in struct shared_data for future refactoring. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
| * x86: fsp: Avoid cast stack_top in struct shared_dataBin Meng2016-01-133-4/+4
| | | | | | | | | | | | | | | | | | Declare stack_top as u32 in struct shared_data and struct common_buf so that we can avoid casting in fsp_init(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
| * x86: fsp: Simplify fsp_continue()Bin Meng2016-01-132-26/+7
| | | | | | | | | | | | | | | | | | There is no need to pass shared_data to fsp_continue() so we can remove unnecessary codes that simplifies the function a lot. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* | arm: initialize gd for AArch64Stephen Warren2016-01-141-0/+2
| | | | | | | | | | | | | | | | | | | | | | Commit adc421e4cee8 "arm: move gd handling outside of C code" removed the call to arch_setup_gd() on ARM and replaced it with assembly code in crt0.S. However, AArch64 uses a different startup file, and the same change was not made to it. This leaves gd uninitialized on AArch64, which typically leads to hangs or crashes. This change fixes that. Fixes: adc421e4cee8 ("arm: move gd handling outside of C code") Signed-off-by: Stephen Warren <swarren@nvidia.com>
* | Merge git://www.denx.de/git/u-boot-marvellTom Rini2016-01-1427-373/+1554
|\ \ | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/Kconfig Signed-off-by: Tom Rini <trini@konsulko.com>
| * | mvebu: Support Synology DS414Phil Sutter2016-01-144-2/+347
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for the MV78230 based DS414 NAS by Synology. The relevant bits have been extracted from the 'synogpl-5004-armadaxp' package Synology kindly published, garnished with a fair amount of trial-and-error. Sadly, support is far from perfect. The major parts I have failed in are SATA and XHCI support. Details about these and some other things follow: Device Tree ----------- The device tree file armada-xp-synology-ds414.dts has been copied from Linux and enhanced by recent U-Boot specific changes to armada-xp-gp.dts. SATA Support ------------ There is a Marvell 88SX7042 controller attached to PCIe which is supported by Linux's sata_mv driver but sadly not U-Boot's sata_mv. I'm not sure if extending the latter to support PCI devices is worth the effort at all. Porting sata_mv from Linux exceeded my brain's capacities. :( XHCI Support ------------ There is an EtronTech EJ168A XHCI controller attached to PCIe which drives the two rear USB3 ports. After a bit of playing around I managed to get it recognized by xhci-pci, but never was able to access any devices attached to it. Enabling it in ds414 board config shows that it does not respond to commands for whatever reason. The (somewhat) bright side to it is that it is not even supported in Synology's customized U-Boot, but that also means nowhere to steal the relevant bits from. EHCI Support ------------ This seems functional after issuing 'usb start'. At least it detects USB storage devices, and IIRC reading from them was OK. OTOH Linux fails to register the controller if 'usb start' wasn't given before in U-Boot. According to Synology sources, this board seems to support USB device (gadget?) mode. Though I didn't play around with it. PCIe Support ------------ This is fine, but trying to gate the clocks of unused lanes will hang PCI enum. In addition to that, pci_mvebu seems not to support DM_PCI. DDR3 Training ------------- Marvell/Synology uses eight PUPs instead of four. Does not look like this is meant to be customized in mainline U-Boot at all. OTOH I have no idea what a "PUP" actually is. PEX Init -------- Synology uses different values than mainline U-Boot with this patch: pex_max_unit_get returns 2, pex_max_if_get returns 7 and max_serdes_lines is set to 7. Not changing this seems to not have an impact, although I'm not entirely sure it does not cause issues I am not aware of. Static Environment ------------------ This allows to boot stock Synology firmware at least. In order to be a little more flexible when it comes to booting custom kernels, do not only load zImage partition, but also rd.gz into memory. This way it is possible to use about 7MB for kernel with piggyback initramfs. Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | mvebu: Add rudimental MV78230 supportPhil Sutter2016-01-143-6/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | This adds basic support for Marvell's MV78230 SoC which belongs to the Armada XP series. Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | mvebu: Introduce kconfig symbols for SoC variantsPhil Sutter2016-01-141-4/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds intermediate kconfig symbols which select their SoC family. Boards then select them instead of the family symbol directly. Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | mvebu: axp: refactor board_sat_r_get() and callerPhil Sutter2016-01-141-31/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of calling board_sat_r_get() only for those boards providing the satr11 value via I2C, call it for all boards and return static values for those not using I2C. In addition to that, make this a weak function to allow for board code to override it. Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | drivers/pci/pci_mvebu: Fix for boards with X4 lanesPhil Sutter2016-01-141-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Armada XP has support for X4 lanes, boards specify this in their serdes_cfg. During PEX init in high_speed_env_lib.c, the configuration is stored in GEN_PURP_RES_2_REG. When enumerating PEX, subsequent interfaces of an X4 lane must be skipped. Otherwise the enumeration hangs up the board. The way this is implemented here is not exactly beautiful, but it mimics how Marvell's BSP does it. Alternatively we could get the information using board_serdes_cfg_get(), but that won't lead to clean code, either. Signed-off-by: Phil Sutter <phil@nwl.cc> Acked-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
| * | arm: mvebu: Add runtime detection of UART (xmodem) boot-modeStefan Roese2016-01-144-20/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds runtime detection of the Marvell UART boot-mode (xmodem protocol). If this boot-mode is detected, SPL will return to the BootROM to continue the UART booting. With this patch its now possible, to generate a U-Boot image that can be booted either from the strapped boot-device (e.g. SPI NOR, MMC, etc) or via the xmodem protocol from the UART. In the UART case, the kwboot tool will dynamically insert the UART boot-device type into the image. And also patch the load address in the header, so that the mkimage header will be skipped (as its not expected by the Marvell BootROM). This simplifies the development for Armada XP / 38x based boards. As no special images need to be generated by selecting the MVEBU_BOOTROM_UARTBOOT Kconfig option. Since the Kconfig option MVEBU_BOOTROM_UARTBOOT is not needed any more, its now completely removed. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Phil Sutter <phil@nwl.cc> Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
| * | arm: mvebu: Add runtime boot-device detectionStefan Roese2016-01-142-7/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds runtime boot-device detection to SPL U-Boot. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Phil Sutter <phil@nwl.cc> Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
| * | arm: mvebu: Make local structs static constStefan Roese2016-01-141-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As these structs are local only and const, declare them accordingly. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Phil Sutter <phil@nwl.cc> Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
| * | arm: mvebu: Move SAR register defines into headerStefan Roese2016-01-142-16/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is preparation for the runtime bootmode detection in spl.c. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Cc: Dirk Eibach <dirk.eibach@gdsys.cc> Cc: Phil Sutter <phil@nwl.cc> Cc: Kevin Smith <kevin.smith@elecsyscorp.com>
| * | arm: mvebu: Remove leftover MakefileStefan Roese2016-01-141-14/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | This Makefile was not used since quite some time. I only missed to remove it in the move to mach-mvebu. So lets remove it now so that the mvebu-common directory is really removed completely. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
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