summaryrefslogtreecommitdiffstats
path: root/arch/x86
Commit message (Expand)AuthorAgeFilesLines
* x86: quark: Bypass TSC calibrationBin Meng2015-02-061-0/+5
* x86: Allow overriding TSC_FREQ_IN_MHZBin Meng2015-02-061-20/+20
* x86: Enable the Intel quark/galileo buildBin Meng2015-02-062-0/+18
* x86: Add basic Intel Galileo board supportBin Meng2015-02-062-0/+44
* x86: Add basic Intel Quark processor supportBin Meng2015-02-066-0/+295
* x86: quark: Add Cache-As-RAM initializationBin Meng2015-02-061-0/+105
* x86: Define macros for pci configuration space accessBin Meng2015-02-062-7/+13
* x86: quark: Add routines to access message bus registersBin Meng2015-02-062-0/+183
* x86: Add header files for Intel Quark SoC definesBin Meng2015-02-062-0/+68
* x86: Add support for Intel Minnowboard MaxSimon Glass2015-02-0615-2/+3831
* x86: Allow a UART to be set up before the FSP is readySimon Glass2015-02-062-0/+7
* x86: Allow FSP Kconfig settings for all x86Simon Glass2015-02-062-38/+38
* x86: Remove unnecessary casts and fix comment typosSimon Glass2015-02-061-5/+5
* x86: mmc: Move common FSP functions into a common fileSimon Glass2015-02-065-72/+59
* x86: Make CAR and DRAM FSP code commonSimon Glass2015-02-054-1/+3
* x86: Adjust the FSP types slightlySimon Glass2015-02-054-7/+9
* x86: Move common FSP code into a common locationSimon Glass2015-02-0518-8/+16
* x86: video: Allow video ROM execution to fall back to the other methodSimon Glass2015-02-051-1/+2
* x86: Rename MMCONF_BASE_ADDRESS and make it common across x86Simon Glass2015-02-053-2/+16
* x86: ivybridge: Drop the Kconfig MRC cache informationSimon Glass2015-01-241-28/+0
* x86: config: Enable hook for saving MRC configurationSimon Glass2015-01-241-0/+5
* x86: Implement a cache for Memory Reference Code parametersSimon Glass2015-01-245-0/+464
* x86: dts: Add SPI flash MRC details for chromebook_linkSimon Glass2015-01-241-1/+14
* x86: Use ipchecksum from net/Simon Glass2015-01-244-97/+4
* x86: Fix various code format issues in start16.SBin Meng2015-01-231-10/+10
* x86: Test mtrr support flag before accessing mtrr msrBin Meng2015-01-233-2/+19
* x86: Save mtrr support flag in global dataBin Meng2015-01-232-6/+14
* x86: Add missing DECLARE_GLOBAL_DATA_PTR for mtrr.cBin Meng2015-01-231-0/+2
* x86: Fix out of bounds irq handlers accessSebastien Ronsse2015-01-231-1/+1
* x86: Support ROMs on other archsSimon Glass2015-01-231-0/+2
* x86: coreboot: Configure pci memory regionsBin Meng2015-01-131-2/+28
* x86: Make chromebook_link the default board for corebootBin Meng2015-01-133-219/+217
* x86: coreboot: Move coreboot-specific defines from coreboot.h to KconfigBin Meng2015-01-132-0/+17
* x86: Hide ROM chip size when CONFIG_X86_RESET_VECTOR is not selectedBin Meng2015-01-131-0/+2
* x86: Move CONFIG_X86_RESET_VECTOR and CONFIG_SYS_X86_START16 to KconfigBin Meng2015-01-131-0/+9
* x86: Allow a hardcoded TSC frequency provided by KconfigBin Meng2015-01-132-2/+26
* x86: coreboot: Set up timer base correctlyBin Meng2015-01-131-13/+20
* x86: fsp: Drop get_hob_type() and get_hob_length()Bin Meng2015-01-135-44/+14
* x86: Add an 'mtrr' command to list and adjust MTRRsSimon Glass2015-01-132-0/+139
* x86: ivybridge: Update microcode early in bootSimon Glass2015-01-135-13/+40
* x86: Disable CAR before relocation on platforms that need itSimon Glass2015-01-131-0/+8
* x86: ivybridge: Add a way to turn off the CARSimon Glass2015-01-131-0/+46
* x86: Commit the current MTRRs before relocationSimon Glass2015-01-131-0/+8
* x86: ivybridge: Request MTRRs for DRAM regionsSimon Glass2015-01-131-0/+10
* x86: ivybridge: Set up an MTRR for the video frame bufferSimon Glass2015-01-131-0/+7
* x86: Add support for MTRRsSimon Glass2015-01-136-101/+187
* x86: ivybridge: Drop support for ROM cachingSimon Glass2015-01-131-25/+0
* x86: Tidy up VESA mode numbersSimon Glass2015-01-131-4/+7
* x86: Use cache, don't clear the display in video BIOSSimon Glass2015-01-131-3/+2
* x86: ivybridge: Only run the Video BIOS when video is enabledSimon Glass2015-01-131-1/+8
OpenPOWER on IntegriCloud