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* x86: gpio: add pinctrl support from the device treeGabriel Huau2015-06-041-0/+1
* x86: coreboot: Fix cosmetic issuesBin Meng2015-06-041-1/+0
* x86: qemu: Adjust VGA initializationBin Meng2015-06-041-0/+2
* x86: qemu: Enable legacy IDE I/O ports decodeBin Meng2015-06-042-0/+24
* x86: qemu: Turn on legacy segments decodeBin Meng2015-06-041-0/+6
* x86: quark: Implement PIRQ routingBin Meng2015-06-042-15/+70
* x86: Refactor PIRQ routing supportBin Meng2015-06-042-55/+76
* x86: Support QEMU x86 targetsBin Meng2015-06-042-0/+30
* x86: Add a CPU driver for baytrailSimon Glass2015-04-303-6/+21
* x86: Allow CPUs to be set up after relocationSimon Glass2015-04-302-0/+16
* x86: Add functions to set and clear bits on MSRsSimon Glass2015-04-301-0/+28
* x86: Add multi-processor initSimon Glass2015-04-305-5/+187
* x86: Provide access to the IDTSimon Glass2015-04-291-0/+2
* x86: Store the GDT pointer in global_dataSimon Glass2015-04-291-0/+1
* x86: Add an mfence macroSimon Glass2015-04-291-0/+5
* x86: Add defines for fixed MTRRsSimon Glass2015-04-291-0/+14
* x86: Add atomic operationsSimon Glass2015-04-291-0/+115
* x86: Add support for the Simple Firmware Interface (SFI)Simon Glass2015-04-291-0/+137
* x86: Implement reset_cpu() correctly for modern CPUsSimon Glass2015-04-291-0/+19
* x86: quark: Turn on legacy segments decodeBin Meng2015-04-291-0/+7
* x86: baytrail: fix the GPIOBASE addressGabriel Huau2015-04-291-1/+1
* x86: queensbay: Implement PIRQ routingBin Meng2015-04-294-2/+188
* x86: Support platform PIRQ routingBin Meng2015-04-291-0/+139
* x86: Write configuration tables in last_stage_init()Bin Meng2015-04-291-0/+49
* x86: Add a function to assign IRQ numbers to PCI deviceBin Meng2015-04-291-0/+14
* x86: Clean up arch/x86/include/asm/e820.hBin Meng2015-04-291-131/+2
* x86: Set serial port IRQ for SMSC LPC47MBin Meng2015-04-291-0/+3
* x86: queensbay: Avoid using PCH prefixBin Meng2015-04-291-2/+1
* dm: x86: spi: Convert ICH SPI driver to driver modelSimon Glass2015-04-181-2/+2
* dm: x86: pci: Convert chromebook_link to use driver model for pciSimon Glass2015-04-181-1/+0
* dm: x86: pci: Add a PCI driver for driver modelSimon Glass2015-04-181-0/+8
* x86: Add a x86_ prefix to the x86-specific PCI functionsSimon Glass2015-04-161-6/+6
* generic-board: select SYS_GENERIC_BOARD for some architecturesMasahiro Yamada2015-03-281-1/+0
* Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2015-02-1021-9/+576
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| * x86: quark: Initialize non-standard BARsBin Meng2015-02-061-0/+32
| * x86: quark: Add Memory Reference Code (MRC) main routinesBin Meng2015-02-061-0/+187
| * x86: Add basic Intel Quark processor supportBin Meng2015-02-061-0/+13
| * x86: Define macros for pci configuration space accessBin Meng2015-02-061-2/+11
| * x86: quark: Add routines to access message bus registersBin Meng2015-02-061-0/+106
| * x86: Add header files for Intel Quark SoC definesBin Meng2015-02-062-0/+68
| * x86: Add support for Intel Minnowboard MaxSimon Glass2015-02-063-0/+147
| * x86: Allow a UART to be set up before the FSP is readySimon Glass2015-02-061-0/+3
| * x86: Adjust the FSP types slightlySimon Glass2015-02-053-5/+7
| * x86: Move common FSP code into a common locationSimon Glass2015-02-059-1/+1
| * x86: Rename MMCONF_BASE_ADDRESS and make it common across x86Simon Glass2015-02-051-1/+1
* | common: Move dram_init() declaration to common locationMichal Simek2015-02-091-6/+0
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* x86: Implement a cache for Memory Reference Code parametersSimon Glass2015-01-242-0/+54
* x86: Use ipchecksum from net/Simon Glass2015-01-241-37/+0
* x86: Test mtrr support flag before accessing mtrr msrBin Meng2015-01-231-1/+4
* x86: Save mtrr support flag in global dataBin Meng2015-01-231-6/+7
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