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* x86: Fix PCI UART compatible string for crownbay and galileoBin Meng2015-12-092-5/+5
* x86: Convert to use driver model timerBin Meng2015-12-0111-0/+32
* ns16550: unify serial_x86Thomas Chou2015-11-201-1/+1
* x86: qemu: Convert to use driver model keyboardBin Meng2015-11-192-0/+2
* x86: crownbay: Convert to use driver model keyboardBin Meng2015-11-191-0/+1
* x86: Add an i8042 device for boards that have itSimon Glass2015-11-193-0/+11
* Various Makefiles: Add SPDX-License-Identifier tagsTom Rini2015-11-101-0/+4
* x86: Add support for Advantech SOM-6896George McCollister2015-10-212-1/+45
* x86: galileo: Enable mrc cacheBin Meng2015-10-211-0/+4
* x86: Remove unused rw-mrc-cache properties in the link and panther dts filesBin Meng2015-10-212-5/+0
* x86: Enable mrc cache for bayleybay and minnowmaxBin Meng2015-10-212-0/+12
* x86: galileo: Add PCIe root port IRQ routingBin Meng2015-09-161-0/+12
* x86: Convert to use driver model pci on quark/galileoBin Meng2015-09-091-2/+6
* x86: panther: Add PCI and video configurationSimon Glass2015-09-091-0/+10
* exynos: x86: dts: Add tpm nodes to the device tree for Chrome OS devicesSimon Glass2015-08-312-0/+10
* x86: crownbay: Support Topcliff integrated pci uart devices with driver modelBin Meng2015-08-261-5/+10
* x86: crownbay: Enable on-board SMSC superio keyboard controllerBin Meng2015-08-261-1/+1
* x86: minnowmax: Correct pad-offset value for host_en1Simon Glass2015-08-261-1/+1
* x86: minnowmax: Add access to GPIOs E0, E1, E2Simon Glass2015-08-261-0/+27
* x86: baytrail: Support multiple microcode copiesBin Meng2015-08-262-0/+9
* x86: baytrail: Add microcode for BayTrail-I D0 steppingBin Meng2015-08-261-0/+3284
* x86: minnowmax: Define and enable interrupt setupSimon Glass2015-08-141-3/+66
* x86: baytrail: Configure FSP UPD from device treeAndrew Bradford2015-08-142-0/+94
* x86: dts: Add a device tree file for EFISimon Glass2015-08-052-0/+23
* x86: bayleybay: Configure PCI IRQBin Meng2015-08-051-0/+63
* x86: Add Intel Bayley Bay board supportBin Meng2015-08-052-1/+136
* x86: Add microcode for BayTrail-I B0 steppingBin Meng2015-08-051-0/+4244
* x86: qemu: Add MP initializationBin Meng2015-08-052-0/+14
* x86: qemu: Enable writing MP tableBin Meng2015-07-282-0/+24
* x86: Convert to use driver model pci on queensbay/crownbayBin Meng2015-07-281-1/+5
* x86: Enable DM RTC support for all x86 boardsBin Meng2015-07-287-0/+7
* dm: x86: minnowmax: Move PCI to use driver modelSimon Glass2015-07-141-0/+10
* x86: queensbay: Change PCIe root ports' interrupt routingBin Meng2015-07-141-4/+16
* x86: queensbay: Correct Topcliff device irqsBin Meng2015-07-141-12/+12
* x86: crownbay: Enable DM RTC supportBin Meng2015-07-142-0/+7
* x86: crownbay: Add MP initializationBin Meng2015-07-141-0/+20
* x86: gpio: add pinctrl support from the device treeGabriel Huau2015-06-041-0/+23
* x86: qemu: Implement PIRQ routingBin Meng2015-06-042-0/+48
* x86: coreboot: Control I/O port 0xb2 writing via device treeBin Meng2015-06-041-0/+1
* x86: qemu: Create separate i440fx and q35 device treesBin Meng2015-06-043-2/+37
* x86: quark: Implement PIRQ routingBin Meng2015-06-041-0/+22
* x86: Refactor PIRQ routing supportBin Meng2015-06-041-0/+54
* x86: Support QEMU x86 targetsBin Meng2015-06-042-1/+36
* x86: Enable multi-core init for Minnowboard MAXSimon Glass2015-04-301-0/+20
* x86: link: Add PCH driver to support SPI FlashSimon Glass2015-04-291-1/+1
* x86: minnowmax: use the correct NOR in the configurationGabriel Huau2015-04-291-1/+1
* x86: minnowmax: add GPIO banks in the device treeGabriel Huau2015-04-291-0/+42
* x86: Add alias for SPI node in the board dtsBin Meng2015-04-293-2/+11
* x86: chromebook_link: dts: Add PCH and LPC devicesSimon Glass2015-04-181-31/+39
* dm: x86: pci: Convert chromebook_link to use driver model for pciSimon Glass2015-04-181-1/+2
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