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* x86: quark: Fix boot breakageBin Meng2016-01-191-11/+16
* Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2016-01-148-17/+427
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| * x86: qemu: fix cpu device in smp bootMiao Yan2016-01-132-11/+72
| * x86: use actual CPU number for allocating memoryMiao Yan2016-01-131-3/+3
| * x86: fix a typo in function nameMiao Yan2016-01-131-3/+3
| * x86: qemu: add a cpu uclass driver for qemu targetMiao Yan2016-01-132-1/+58
| * x86: qemu: add fw_cfg supportMiao Yan2016-01-133-1/+287
| * x86: ivybridge: Do not require HAVE_INTEL_MEBin Meng2016-01-131-1/+0
| * x86: fsp: Set up init runtime buffer in update_fsp_configs()Bin Meng2016-01-132-2/+14
| * x86: queensbay: Remove invalid comments in update_fsp_configs()Bin Meng2016-01-131-6/+0
| * x86: fsp: Rename update_fsp_upd() and change its signatureBin Meng2016-01-132-3/+4
* | Fix board init code to respect the C runtime environmentAlbert ARIBAUD2016-01-131-1/+2
* | dm: Convert PCI MMC over to use DM PCI APISimon Glass2016-01-123-6/+6
* | dm: pci: video: Convert video and pci_rom to use DM PCI APISimon Glass2016-01-121-2/+2
* | dm: x86: ivybridge: Convert graphics init to use DM PCI APISimon Glass2016-01-122-10/+11
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* x86: Remove HAVE_ACPI_RESUMEBin Meng2015-12-093-34/+0
* x86: Remove CPU_INTEL_SOCKET_RPGA989Bin Meng2015-12-091-11/+4
* x86: Clean up ivybridge/chrome Kconfig optionsBin Meng2015-12-091-30/+0
* x86: ivybridge: Remove NORTHBRIDGE_INTEL_SANDYBRIDGEBin Meng2015-12-092-33/+1
* x86: Move i8254_init() to x86_cpu_init_f()Bin Meng2015-12-091-0/+5
* x86: tsc: Remove legacy timer codesBin Meng2015-12-012-6/+0
* x86: Convert to use driver model timerBin Meng2015-12-017-39/+0
* x86: Remove MIN_PORT80_KCLOCKS_DELAYBin Meng2015-12-011-18/+0
* x86: Remove legacy pci codesBin Meng2015-11-131-45/+0
* x86: qemu: Convert to use driver model pciBin Meng2015-11-132-50/+0
* x86: qemu: Move chipset-specific codes from pci.c to qemu.cBin Meng2015-11-132-72/+82
* x86: qemu: Remove call to vgabios executionBin Meng2015-11-131-18/+1
* x86: queensbay: Really disable IGDBin Meng2015-11-131-6/+20
* x86: Rename pcat_ to i8254 and i8259 accordinglyBin Meng2015-11-131-1/+1
* x86: ivybridge: Enable the MRC cacheBin Meng2015-10-211-8/+2
* x86: ivybridge: Measure the MRC code execution timeSimon Glass2015-10-211-0/+3
* x86: ivybridge: Fix car_uninit() to correctly set run stateSimon Glass2015-10-211-1/+1
* x86: ivybridge: Check the RTC return valueSimon Glass2015-10-211-3/+10
* x86: ivybridge: Use 'ret' instead of 'rcode'Simon Glass2015-10-211-8/+8
* x86: chromebook_link: Enable the debug UARTSimon Glass2015-10-211-0/+7
* x86: Init the debug UART if enabledSimon Glass2015-10-211-8/+3
* x86: Pass correct cpu_index to ap_init()Bin Meng2015-10-211-2/+2
* x86: quark: Implement mrc cacheBin Meng2015-10-212-7/+64
* x86: ivybridge: Correct two typos for MRCBin Meng2015-10-211-2/+2
* x86: baytrail: Issue full system reset in reset_cpu()Bin Meng2015-10-211-0/+6
* x86: baytrail: Save mrc cache to spi flashBin Meng2015-10-211-0/+19
* x86: Use struct mrc_region to describe a mrc regionBin Meng2015-10-211-1/+1
* x86: ivybridge: Use APIs provided in the mrccache libBin Meng2015-10-211-108/+4
* x86: Move mrccache.[c|h] to a common placeBin Meng2015-10-213-159/+1
* x86: Initialize GDT entry 1 to be the 32-bit CS as wellBin Meng2015-10-211-1/+6
* x86: Allow disabling IGD on Intel QueensbayBin Meng2015-10-212-0/+27
* x86: ivybridge: Remove the dead codes that programs pci bridgeBin Meng2015-10-211-32/+0
* x86: quark: Configure MTRR to enable cacheBin Meng2015-09-162-0/+67
* x86: quark: Initialize thermal sensor properlyBin Meng2015-09-161-0/+40
* x86: quark: Lock HMBOUND register before jumping to kernelBin Meng2015-09-161-0/+3
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