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path: root/arch/powerpc/cpu/mpc85xx/start.S
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* powerpc/mpc85xx:Make L2 cache type independent of CHASSIS2Prabhakar Kushwaha2013-10-161-1/+1
* Coding Style cleanup: remove trailing white spaceWolfgang Denk2013-10-141-1/+1
* powerpc/mpc85xx: Add workaround for erratum A-005125York Sun2013-09-101-0/+8
* powerpc/srio-pcie-boot: Avoid the NOR_BOOT macro when boot from SRIO/PCIELiu Gang2013-08-091-1/+2
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-241-17/+1
* powerpc/mpc85xx: modify the functionality clear_bss and aligning the end addr...Ying Zhang2013-06-201-1/+1
* powerpc/mpc85xx: Clear L1 D-cache lockYork Sun2013-05-241-0/+1
* Add e6500 L2 replacement policy selectionJames Yang2013-05-241-0/+1
* Enable L2 cache parity/ECC error checkingJames Yang2013-05-241-1/+1
* e6500: Move L1 enablement after L2 enablementAndy Fleming2013-05-141-47/+47
* powerpc/mpc85xx: Add definitions for HDBCR registersAndy Fleming2013-05-141-4/+4
* Replace __bss_end__ with __bss_endSimon Glass2013-03-151-2/+2
* powerpc/mpc85xx: add support for MMUv2 page sizesScott Wood2013-01-301-1/+1
* spl/powerpc: introduce CONFIG_SPL_INIT_MINIMALScott Wood2012-11-261-13/+20
* powerpc/mpc85xx: fix TLB alignmentScott Wood2012-11-261-4/+4
* powerpc/mpc85xx: move debug tlb entry after TLB is in known stateScott Wood2012-11-261-44/+40
* powerpc/mpc85xx: Enable L2 at the beginning of U-boot for E6500York Sun2012-10-221-1/+36
* powerpc/mpc85xx: Introduce new macros to add and delete TLB entriesYork Sun2012-10-221-179/+130
* powerpc/85xx: clear out TLB on bootScott Wood2012-08-231-33/+43
* powerpc/fsl-corenet: work around erratum A004510Scott Wood2012-08-231-0/+284
* mpc85xx: Initial SP alignment is wrong.Joakim Tjernlund2012-08-221-11/+5
* powerpc/85xx:Fix NAND code base to support debuggerPrabhakar Kushwaha2012-07-061-1/+1
* powerpc/85xx:Make debug exception vector accessiblePrabhakar Kushwaha2012-07-061-5/+78
* powerpc/85xx:Fix MSR[DE] bit in MSR to support debuggerPrabhakar Kushwaha2012-07-061-2/+5
* powerpc/85xx: don't touch MAS7 on e500v1 when relocating CCSRTimur Tabi2012-04-241-2/+6
* powerpc/85xx:Avoid vector table compilation for nand_splPrabhakar Kushwaha2012-04-241-0/+6
* powerpc/85xx:Fix IVORs addr after vector table relocationPrabhakar Kushwaha2012-04-241-0/+33
* powerpc/85xx:Avoid hardcoded vector address for IVORsPrabhakar Kushwaha2012-04-241-31/+34
* powerpc/85xx: Add workaround for erratum CPU-A003999Kumar Gala2011-11-291-0/+6
* powerpc/85xx: resize the boot page TLB before relocating CCSRTimur Tabi2011-11-081-0/+49
* powerpc/85xx: verify the current address of CCSR before relocating itTimur Tabi2011-11-081-0/+27
* powerpc/85xx: add some missing sync instructions in the CCSR relocation codeTimur Tabi2011-11-081-0/+4
* powerpc/85xx: fix some comments in the CCSR relocation codeTimur Tabi2011-11-081-2/+2
* powerpc/p4080: Add support for secure boot flowRuchika Gupta2011-10-031-1/+54
* powerpc/85xx: relocate CCSR before creating the initial RAM areaTimur Tabi2011-09-291-0/+234
* powerpc/85xx: provide 85xx flush_icache for cmd_cacheMatthew McClintock2011-07-291-0/+2
* unify version_stringAndreas Bießmann2011-07-281-8/+1
* Revert "PowerPC: Add support for -msingle-pic-base"Wolfgang Denk2011-04-201-10/+0
* PowerPC: Add support for -msingle-pic-baseJoakim Tjernlund2011-04-111-0/+10
* rename _end to __bss_end__Po-Yu Chuang2011-03-271-2/+2
* powerpc/85xx: Fix bug in dcache_disableKumar Gala2011-01-141-2/+2
* PowerPC: Don't destroy fixup table while doing fixupsJoakim Tjernlund2010-11-141-1/+1
* powerpc/85xx: rename CONFIG_SYS_TEXT_BASE to CONFIG_SYS_MONITOR_BASEHaiying Wang2010-11-111-9/+9
* Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated valueWolfgang Denk2010-10-261-0/+1
* powerpc: do not fixup NULL ptrsJoakim Tjernlund2010-10-181-1/+3
* Rename TEXT_BASE into CONFIG_SYS_TEXT_BASEWolfgang Denk2010-10-181-9/+9
* powerpc: Remove warm reset entry pointPeter Tyser2010-10-121-0/+2
* powerpc/85xx: Move INIT_RAM_ADDR physical address to 36-bit spaceyork2010-07-261-0/+10
* Move arch/ppc to arch/powerpcStefan Roese2010-04-211-0/+1195
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