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* Use correct spelling of "U-Boot"Bin Meng2016-02-063-7/+7
| | | | | | | | | | Correct spelling of "U-Boot" shall be used in all written text (documentation, comments in source files etc.). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
* arm: exynos: clean up checkpatch issuesMinkyu Kang2015-11-021-4/+4
| | | | | | | | | | | | | | | | | | This patch will fix these checkpatch issues. ERROR: Macros with complex values should be enclosed in parentheses +#define DEFAULT_DQS_X4 (DEFAULT_DQS << 24) || (DEFAULT_DQS << 16) \ + || (DEFAULT_DQS << 8) || (DEFAULT_DQS << 0) ERROR: space prohibited before that ',' (ctx:WxW) + writel(val , &drex0->concontrol); ^ ERROR: space prohibited before that ',' (ctx:WxW) + writel(val , &drex1->concontrol); ^ Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Exynos4412: pinmux: disable pull for MMC pinsPrzemyslaw Marczak2015-11-021-1/+1
| | | | | | | | | | | | | | | | | | | | | There are 8 pins for SD card in Exynos, but the MUX was configured only for 7, since the one was used for card detection. This caused the pin's pull wrong configuration. This commit fixes this and the card detect can work properly, after call this function. Tested-on: Odroid U3 and Odroid X2. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Guillaume GARDET <guillaume.gardet@free.fr> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* dm: adc: add Exynos54xx compatible ADC driverPrzemyslaw Marczak2015-11-021-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | This commit adds driver for Exynos54xx ADC subsystem. The driver is implemented using driver model, amd provides ADC uclass's methods for ADC single channel operations: - adc_start_channel() - adc_channel_data() - adc_stop() The basic parameters of ADC conversion, are: - sample rate: 600KSPS - output the data as average of 8 time conversion ADC features: - sample rate: 600KSPS - resolution: 12-bit - channels: 10 (analog multiplexer) Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* Exynos5422/5800: set cpu id to 0x5422Przemyslaw Marczak2015-11-027-18/+18
| | | | | | | | | | | | | | | | | The proper CPU ID for those Exynos variants is 0x5422, but before the 0x5800 was set. This commit fix this back. Changes: - set cpu id to 0x5422 instead of 0x5800 - remove macro proid_is_exynos5800() - add macro proid_is_exynos5422() - change the calls to proid_is_exynos5800() with new macro Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Simon Glass <sjg@chromium.org> Tested-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* mach-exynos: clock: restore calling dead exynos4_get_mmc_clk()Przemyslaw Marczak2015-10-031-6/+4
| | | | | | | | | | | | | | | | | | | | | | After rework of code by: commit: d952796 Exynos5: Use clock_get_periph_rate generic API function get_mmc_clk() always returns -1 for Exynos 4. This was caused by omitting, that SDHCI driver for Exynos 4, calls get_mmc_clk(), with mmc device number as argument, instead of pinmux peripheral id, like DW MMC driver for Exynos 5. By this commit, the code directly calls a proper function to get mmc clock for Exynos 4, without checking the peripheral id. Tested on: Odroid U3/X2, Trats, Trats2, Odroid XU3, Snow (by Simon). Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
* of: clean up OF_CONTROL ifdef conditionalsMasahiro Yamada2015-08-184-7/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | We have flipped CONFIG_SPL_DISABLE_OF_CONTROL. We have cleansing devices, $(SPL_) and CONFIG_IS_ENABLED(), so we are ready to clear away the ugly logic in include/fdtdec.h: #ifdef CONFIG_OF_CONTROL # if defined(CONFIG_SPL_BUILD) && !defined(SPL_OF_CONTROL) # define OF_CONTROL 0 # else # define OF_CONTROL 1 # endif #else # define OF_CONTROL 0 #endif Now CONFIG_IS_ENABLED(OF_CONTROL) is the substitute. It refers to CONFIG_OF_CONTROL for U-boot proper and CONFIG_SPL_OF_CONTROL for SPL. Also, we no longer have to cancel CONFIG_OF_CONTROL in include/config_uncmd_spl.h and scripts/Makefile.spl. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org>
* of: flip CONFIG_SPL_DISABLE_OF_CONTROL into CONFIG_SPL_OF_CONTROLMasahiro Yamada2015-08-181-8/+0
| | | | | | | | | | | | | | | | | | | As we discussed a couple of times, negative CONFIG options make our life difficult; CONFIG_SYS_NO_FLASH, CONFIG_SYS_DCACHE_OFF, ... and here is another one. Now, there are three boards enabling OF_CONTROL on SPL: - socfpga_arria5_defconfig - socfpga_cyclone5_defconfig - socfpga_socrates_defconfig This commit adds CONFIG_SPL_OF_CONTROL for them and deletes CONFIG_SPL_DISABLE_OF_CONTROL from the other boards to invert the logic. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* ARM: exynos: fix regression for Origen4210Thomas Abraham2015-08-172-4/+2
| | | | | | | | | | | | | | The do_lowlevel_init() function includes certian CA15 specific L2 cache configuration which is only applicable on Exynos5420 and members of its family. Fix the regression on Origen4210 by skipping the Exynos5420 specific portions of the code. Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Tested-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* ARM: exynos: move SoC sources to mach-exynosThomas Abraham2015-08-1753-0/+16692
Move arch/arm/cpu/armv7/exynos/* to arch/arm/mach-exynos/* to allow reuse of existing code for ARMv8 based Exynos platforms. Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Masahiro Yamada <yamada.masahiro@socionext.com> Tested-by: Przemyslaw Marczak <p.marczak@samsung.com> Acked-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
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