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authorBin Meng <bmeng.cn@gmail.com>2016-02-05 19:30:11 -0800
committerAnatolij Gustschin <agust@denx.de>2016-02-06 12:00:59 +0100
commita187559e3d586891c917279044c5386d1b2adc6e (patch)
tree8d50525d0381f28cd41f86e6d8f42ad47d26063e /arch/arm/mach-exynos
parent94985cc9d3d7ed991ca8b2627d5894df5ea68f49 (diff)
downloadtalos-obmc-uboot-a187559e3d586891c917279044c5386d1b2adc6e.tar.gz
talos-obmc-uboot-a187559e3d586891c917279044c5386d1b2adc6e.zip
Use correct spelling of "U-Boot"
Correct spelling of "U-Boot" shall be used in all written text (documentation, comments in source files etc.). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heiko Schocher <hs@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch/arm/mach-exynos')
-rw-r--r--arch/arm/mach-exynos/include/mach/spl.h8
-rw-r--r--arch/arm/mach-exynos/sec_boot.S4
-rw-r--r--arch/arm/mach-exynos/spl_boot.c2
3 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/mach-exynos/include/mach/spl.h b/arch/arm/mach-exynos/include/mach/spl.h
index 0c480acb1a..a5d13fa7cb 100644
--- a/arch/arm/mach-exynos/include/mach/spl.h
+++ b/arch/arm/mach-exynos/include/mach/spl.h
@@ -42,10 +42,10 @@ struct spl_machine_param {
u32 mem_iv_size; /* Memory channel interleaving size */
enum ddr_mode mem_type; /* Type of on-board memory */
/*
- * U-boot size - The iROM mmc copy function used by the SPL takes a
- * block count paramter to describe the u-boot size unlike the spi
- * boot copy function which just uses the u-boot size directly. Align
- * the u-boot size to block size (512 bytes) when populating the SPL
+ * U-Boot size - The iROM mmc copy function used by the SPL takes a
+ * block count paramter to describe the U-Boot size unlike the spi
+ * boot copy function which just uses the U-Boot size directly. Align
+ * the U-Boot size to block size (512 bytes) when populating the SPL
* table only for mmc boot.
*/
u32 uboot_size;
diff --git a/arch/arm/mach-exynos/sec_boot.S b/arch/arm/mach-exynos/sec_boot.S
index dfc3455929..5dc216dce1 100644
--- a/arch/arm/mach-exynos/sec_boot.S
+++ b/arch/arm/mach-exynos/sec_boot.S
@@ -30,10 +30,10 @@ relocate_wait_code:
* because that comes out to be the last 4KB of the iRAM
* (Base Address - 0x02020000, Limit Address - 0x020740000).
*
- * U-boot and kernel are aware of this code and flags by the simple
+ * U-Boot and kernel are aware of this code and flags by the simple
* fact that we are implementing a workaround in the last 4KB
* of the iRAM and we have already defined these flag and address
- * values in both kernel and U-boot for our use.
+ * values in both kernel and U-Boot for our use.
*/
code_base:
b 1f
diff --git a/arch/arm/mach-exynos/spl_boot.c b/arch/arm/mach-exynos/spl_boot.c
index c7f943eb6a..7df01021cd 100644
--- a/arch/arm/mach-exynos/spl_boot.c
+++ b/arch/arm/mach-exynos/spl_boot.c
@@ -177,7 +177,7 @@ static void exynos_spi_copy(unsigned int uboot_size, unsigned int uboot_addr)
#endif
/*
-* Copy U-boot from mmc to RAM:
+* Copy U-Boot from mmc to RAM:
* COPY_BL2_FNPTR_ADDR: Address in iRAM, which Contains
* Pointer to API (Data transfer from mmc to ram)
*/
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