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* ARM: at91: sama5d2: configure the L2 cache memorySamuel Mescoff2016-02-182-0/+2
* ARM: at91: clock: add PMC_PLLICPR init functionWenyou Yang2016-02-182-0/+8
* ARM: at91: clock: add PLLB enable/disable functionsWenyou Yang2016-02-181-0/+2
* ARM: at91: clock: add UTMI PLL enable/disable functionWenyou Yang2016-02-181-0/+3
* ARM: at91: clock: add a new file to handle clockWenyou Yang2016-02-181-0/+2
* ARM: at91: asm/at91_pmc.h: fix trival register offsetWenyou Yang2016-02-181-6/+2
* board: atmel: sama5d2_xplained: add SPL supportWenyou Yang2016-02-021-0/+32
* arm: at91/spl: mpddrc: add mpddrc DDR3-SDRAM initializationWenyou Yang2016-02-021-8/+78
* arm: at91/spl: mpddrc: add struct atmel_mpddrc_configWenyou Yang2016-02-021-1/+11
* arm: at91/spl: atmel_sfr: move saic redirect to separate fileWenyou Yang2015-11-302-1/+3
* arm: at91/spl: matrix: use matrix slave id macrosWenyou Yang2015-11-301-0/+25
* arm: atmel: Add SAMA5D2 Xplained boardWenyou Yang2015-11-304-6/+211
* gpio: atmel: Add the PIO4 driver supportWenyou Yang2015-11-301-0/+48
* mmc: atmel: Add atmel sdhci supportWenyou Yang2015-11-031-0/+13
* arm: at91: clock: Add the generated clock supportWenyou Yang2015-11-032-0/+23
* arm: at91: Change the Chip ID registers' addressesWenyou Yang2015-11-033-4/+6
* arm: at91: pmc: replace the constant with a define in at91_pmc.hErik van Luijk2015-08-211-0/+1
* arm: at91: mpddr: allow multiple DDR controllersErik van Luijk2015-08-211-2/+4
* ARM: atmel: at91sam9n12ek: enable spl supportBo Shen2015-04-011-2/+2
* ARM: atmel: at91sam9x5ek: enable spl supportBo Shen2015-04-012-2/+14
* ARM: atmel: armv7: switch to use common timer functionsBo Shen2015-04-012-0/+6
* ARM: atmel: arm9: switch to use common timer functionsBo Shen2015-04-016-0/+18
* ARM: at91: move SoC headers to mach-at91/include/machMasahiro Yamada2015-02-2144-0/+4295
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