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| * ARM64: zynqmp: Extend pcie node to support legacy interruptsBharat Kumar Gogada2016-04-131-0/+10
| | | | | | | | | | | | | | | | Modifying device tree node to support legacy interrupts. Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add interrupt-controller property to gpio nodesMichal Simek2016-04-131-0/+2
| | | | | | | | | | | | | | | | GPIO driver supports an input interrupt that's why gpio node itself can be labeled as interrupt controller. Reported-by: John Linn <linnj@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add ddrc node in dtsNaga Sureshkumar Relli2016-04-131-0/+7
| | | | | | | | | | | | | | | | | | This patch adds ddrc memory controller node in dts. size mentioned in dts is 0x30000, because we need to access DDR_QOS INTR registers located at fd090208 from this driver. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Added clocks to DTVNSL Durga2016-04-131-0/+8
| | | | | | | | | | | | | | | | | | ZynqMP DMA's main clock and apb clock are added in zynqmp DT. Signed-off-by: VNSL Durga <vnsldurg@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
| * ARM64: zynqmp: Add CCI-400 nodeMichal Simek2016-04-131-0/+19
| | | | | | | | | | | | Add CCI-400 node to DTSI. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add missing interrupt-parent to PMU nodeMichal Simek2016-04-131-0/+1
| | | | | | | | | | | | | | | | | | ZynqMP is not using global interrupt-parent setting that's why it has to be listed in every node separately. PMU node missed it and this patch is adding it. Reported-by: John Linn <John.Linn@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: DT: Add power domainsSoren Brinkmann2016-04-131-0/+210
| | | | | | | | | | | | | | | | | | | | Add power-domains to the DT and attach devices to them. The power-domains are all logical domains as understood by firmware. Each PD is identified by a unique identifier that the platform firmware understands. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Added broken-tuning property to SD, eMMC nodesP L Sai Krishna2016-04-131-0/+2
| | | | | | | | | | | | | | | | This patch adds broken-tuning property to SD and eMMC nodes. Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Sync GEM nodes with LinuxMichal Simek2016-04-131-12/+4
| | | | | | | | | | | | | | | | Remove jumbo properties which are handled in the driver directly and use mainline compatible string which is already handled by the driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Hook up the GEMs to the SMMUEdgar E. Iglesias2016-04-131-0/+8
| | | | | | | | | | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Correct IRQ nr for the SMMUEdgar E. Iglesias2016-04-131-5/+5
| | | | | | | | | | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add 8-bit bus width property.P L Sai Krishna2016-04-131-0/+1
| | | | | | | | | | | | | | This patch add 8-bit bus width property to eMMC node. Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: dt: Change qspi node compatible stringRanjit Waghmode2016-04-131-1/+1
| | | | | | | | | | | | | | | | This patch makes compatible string as "m25p80" for qspi node in ep108 device tree file Signed-off-by: Ranjit Waghmode <ranjit.waghmode@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add missing mmc aliasesMichal Simek2016-04-131-0/+2
| | | | | | | | | | | | Add missing mmc aliases. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Use C pre-processor for includes in dtsAlistair Francis2016-04-131-2/+2
| | | | | | | | | | | | | | | | | | | | Change the dtsi include code to use the C pre-processor #include instead of the device tree /include/. This brings all ZynqMP device trees inline with each other. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Move kernel and fdt offsets and sizes to board config fileSiva Durga Prasad Paladugu2016-04-132-2/+8
| | | | | | | | | | | | | | | | Move kernel and fdt offsets and sizes to board config file as the flash size varies across boards Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Do not perform reset at the end of thorMichal Simek2016-04-131-0/+1
| | | | | | | | | | | | Setup reset off for lthor. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Support systems with more memory banksMichal Simek2016-04-132-13/+123
| | | | | | | | | | | | | | This is example how to change u-boot to support more memory banks read from DT. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Use memory initialization based on DTS fileMichal Simek2016-04-131-5/+5
| | | | | | | | | | | | Remove hardcoded memory sizes. Use information from DT memory node. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Fix usb phy node for ZyboMichal Simek2016-04-131-1/+1
| | | | | | | | | | | | Compatible property should be the first. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Extend microzed board supportMichal Simek2016-04-133-1/+43
| | | | | | | | | | | | | | Add missing DT nodes and enable USB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Nathan Rossi <nathan@nathanrossi.com>
| * ARM: zynq: Add missing qspi for xm013Michal Simek2016-04-131-1/+6
| | | | | | | | | | | | Add missing qspi node and make qspi as spi0. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Create empty line below headersMichal Simek2016-04-131-0/+1
| | | | | | | | | | | | Sync with others zynq DTS files. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Align spi and qspi node locationsMichal Simek2016-04-135-37/+37
| | | | | | | | | | | | | | Keep nodes alphabelitally sorted. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Nathan Rossi <nathan@nathanrossi.com>
| * ARM: zynq: zc706: Add adv7511 on i2c busChristian Kohn2016-04-131-0/+15
| | | | | | | | | | | | | | | | Add missing adv7511 and configure to match Base TRD. Signed-off-by: Christian Kohn <christian.kohn@xilinx.com> Reviewed-by: Nathan Rossi <nathan@nathanrossi.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: zc702: Add adv7511 on i2c busChristian Kohn2016-04-131-0/+15
| | | | | | | | | | | | | | Add bindings for adv7511. Signed-off-by: Christian Kohn <christian.kohn@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: DT: Add ethernet phy reset informationPunnaiah Choudary Kalluri2016-04-131-0/+2
| | | | | | | | | | | | | | Added phy reset gpio information for gem0. Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Fix bootargs in board dtsiMichal Simek2016-04-138-8/+8
| | | | | | | | | | | | | | | | - Sync with Linux kernel - Remove rootfs - Remove earlyprintk Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Align devcfg nodeMichal Simek2016-04-131-0/+4
| | | | | | | | | | | | | | | | - Have compatible string as the first property - Sync with Linux kernel dtsi - Add missing interrupt properties Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: dts: Updated devicetree bindings for Zynq 7000 platformMoritz Fischer2016-04-131-0/+1
| | | | | | | | | | | | | | | | Added addtional bindings required for FPGA Manager operation of the Xilinx Zynq Devc configuration interface. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: dts: zynq: Add devicetree entry for Xilinx Zynq reset controller.Moritz Fischer2016-04-131-0/+7
| | | | | | | | | | | | Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Add interrupt-controller property to gpio nodesMichal Simek2016-04-131-0/+2
| | | | | | | | | | | | | | | | GPIO driver supports an input interrupt that's why gpio node itself can be labeled as interrupt controller. Reported-by: John Linn <linnj@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Merge git://www.denx.de/git/u-boot-cfi-flashTom Rini2016-04-131-1/+1
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| * | mtd: cfi: Unlock current sector instead of sector 0 before buffered writeRouven Behr2016-04-131-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Unlock current sector instead of sector 0 before buffered write. [Patch subject and commit text slightly reworded, Stefan] Signed-off-by: Rouven Behr <u-boot@behr-iss.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-04-1349-92/+2442
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| * | mx6slevk: imximage.cfg: update to fix tINIT3 and tIH-CA violationsTom Rini2016-04-031-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Having had a similar board and memory part under logic analyzer, a tINIT3 violation was measured. The fix was involved keeping tXPR and SDE_to_RST at the power-on defaults and setting RST_to_CKE the JEDEC value for LPDDR2. There was also a tIH-CA violation and this was resolved by writing the default value in rather than what the script here uses. Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Peng Fan <peng.fan@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | mx6qarm2: imximage_mx6dl.cfg update to fix tINIT3 violationTom Rini2016-04-031-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Having had a similar board and memory part under logic analyzer, a tINIT3 violation was measured. The fix was involved keeping tXPR and SDE_to_RST at the power-on defaults and setting RST_to_CKE the JEDEC value for LPDDR2. Cc: Jason Liu <jason.hui.liu@nxp.com> Cc: Ye Li <ye.li@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
| * | mx7_common: Define CONFIG_SYS_MALLOC_LEN in the board fileFabio Estevam2016-04-033-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Having CONFIG_SYS_MALLOC_LEN in mx7_common.h is not a good idea, because the malloc() pool size is board dependent. For example: if a certain board has support for splashscreen or DFU, it may be necessary to adjust CONFIG_SYS_MALLOC_LEN to a larger value. So define CONFIG_SYS_MALLOC_LEN in each board config file. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | warp7: Pass the UART base definitionFabio Estevam2016-04-031-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Since commit 5d69269deed0 ("mx7dsabresd: Define serial port locally") we need to specify the UART base address in each board config file, so do this to avoid a build error. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | mx6sabresd: Remove unneeded enable_lvds() functionFabio Estevam2016-04-031-11/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | enable_lvds() function only set bits IOMUXC_GPR2_DATA_WIDTH_CH0_18BIT and IOMUXC_GPR2_DATA_WIDTH_CH1_18BIT, but these bits were already set previously inside setup_display(). We can safely remove enable_lvds() then. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | arm: mxs: Update MX28EVK configMarek Vasut2016-04-032-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | Enable FIT image support, EXT4 support and generic FS support. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | imx: mx7d: move MX7D to Kconfig entryPeng Fan2016-03-262-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If including MX7D in CONFIG_SYS_EXTRA_OPTIONS, CONFIG_ROM_UNIFIED_SECTIONS will not effect.So move MX7D to Kconfig entry from CONFIG_SYS_EXTRA_OPTIONS to "select MX7D" to boards using i.MX7 Dual. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | imx: mx6sx: move MX6SX to Kconfig entryPeng Fan2016-03-264-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If including MX6SX in CONFIG_SYS_EXTRA_OPTIONS, CONFIG_ROM_UNIFIED_SECTIONS will not effect.So move MX6SX to Kconfig entry from CONFIG_SYS_EXTRA_OPTIONS to "select MX6SX" to boards using i.MX6 SoloX. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | arm: mx6: Add CCV xPress board supportStefan Roese2016-03-2610-0/+837
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add support for the CCV xPress board which is equipped with the i.MX6UL. And provides the following interfaces: - 128MiB DDR - UART - I2C - eMMC (with booting) - Ethernet - USB This patch adds two build targets. One with and one without SPL. The non-SPL version is used for loading U-Boot via USB (imx_usb_loader). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
| * | arm: mx6: Add UART8 base address for i.MX6ULStefan Roese2016-03-261-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the base address for the i.MX6UL so that this UART can be used. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Ye Li <ye.li@nxp.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
| * | warp7: Add initial supportFabio Estevam2016-03-268-0/+386
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the basic support for Warp7 board. For more information about this reference design, please visit: https://www.element14.com/community/docs/DOC-79058/l/warp-7-the-next-generation-wearable-reference-platform Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| * | mx7_common: Put early/late init configs into board fileFabio Estevam2016-03-262-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_BOARD_EARLY_INIT_F and CONFIG_BOARD_LATE_INIT should not be placed into mx7_common because not all boards need these options. Move them to the board file instead. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| * | mx6sabresd: Use VESA 1024x768 timingsFabio Estevam2016-03-251-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | VESA 1024x768 results in much more accurate timings. Based on the patch from Soeren Moch for the tbs2910 board. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | mx27: 16-bit wide watchdog registersLeonid Iziumtsev2016-03-252-7/+7
| | | | | | | | | | | | | | | | | | | | | Make the watchdog registers 16-bit wide, as they are according to TRM. Signed-off-by: Leonid Iziumtsev <leonid.iziumtsev@se.atlascopco.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | mx6sabre_common: Fix U-Boot corruption after 'saveenv'Fabio Estevam2016-03-251-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Booting mx6qp sabreauto board and then doing: => saveenv => reset , causes a system hang. This happens because the size of the U-Boot binary is larger than CONFIG_ENV_OFFSET. Fix this problem by increasing CONFIG_ENV_OFFSET, so that the U-boot binary and the environment variables region do not overlap. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>
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