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| * powerpc: Replace CONFIG_SYS_INIT_RAM_END with CONFIG_SYS_INIT_RAM_SIZEYork Sun2016-04-0810-21/+21
| | | | | | | | | | | | | | | | | | | | | | CONFIG_SYS_INIT_RAM_SIZE may be used out of the board header file. Some boards use CONFIG_SYS_INIT_RAM_END for the same purpose. To unify the macros, use CONFIG_SYS_INIT_RAM_SIZE for all. Signed-off-by: York Sun <york.sun@nxp.com> CC: Mario Six <mario.six@gdsys.cc> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de>
| * powerpc: t1040qds: Use generic ethsw commandsCodrin Ciubotariu2016-04-071-1/+1
| | | | | | | | | | | | | | | | | | | | The commands for the VSC9953 l2 switch from T1040 became generic in patch https://patchwork.ozlabs.org/patch/499748/ and the define was renamed. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-04-0643-313/+369
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| * armv8: LS2080A: Consolidate LS2080A and LS2085AYork Sun2016-04-0636-248/+115
| | | | | | | | | | | | | | | | | | | | | | | | LS2080A is the primary SoC, and LS2085A is a personality with AIOP and DPAA DDR. The RDB and QDS boards support both personality. By detecting the SVR at runtime, a single image per board can support both SoCs. It gives users flexibility to swtich SoC without the need to reprogram the board. Signed-off-by: York Sun <york.sun@nxp.com> CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com>
| * armv8: ls1043a: load Fman ucode from SD/MMC under SD bootQianyu Gong2016-04-061-1/+9
| | | | | | | | | | Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1043a: load Fman ucode from NAND flash under NAND bootQianyu Gong2016-04-061-1/+5
| | | | | | | | | | Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8/ls1043aqds: modify CONFIG_SYS_MAX_FLASH_BANKS to 1Wenbin Song2016-04-061-1/+1
| | | | | | | | | | | | | | There is only one flash bank for ls1043aqds. Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * arm: ls102xa: Fix order of CSU indexes in ns_access.hVincent Siles2016-04-061-3/+3
| | | | | | | | | | | | | | | | | | This patch aims to fix the order of CSU slave index for the LS1021a board. Signed-off-by: Vincent Siles <vincent.siles@provenrun.com> Reviewed-by: Alison Wang <alison.wang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: LSCH2 early and final mmu needs matching NS attributeEd Swarthout2016-04-061-4/+8
| | | | | | | | | | | | | | | | | | | | When switching between the early and final mmu tables, the stack will get corrupted if the Non-Secure attribute is different. For ls1043a, this issue is currently masked because flush_dcache_all is called before the switch when CONFIG_SYS_DPAA_FMAN is defined. Signed-off-by: Ed Swarthout <Ed.Swarthout@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * armv8: ls1043aqds: make sure fixed-link property is big endianShaohui Xie2016-04-061-6/+6
| | | | | | | | | | | | | | | | | | When setting fixed-link property to DTS, the values should be converted with using cpu_to_fdt32 so that to have correct value on little endian Soc. Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * drivers: net: vsc9953: Fix bug when PVID is shown for disabled ports onlyCodrin Ciubotariu2016-04-061-1/+1
| | | | | | | | | | | | Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * drivers: net: vsc9953: Do not configure disabled portsCodrin Ciubotariu2016-04-061-4/+8
| | | | | | | | | | | | | | | | | | | | | | | | Some SerDes protocols might not enable all l2switch ports. In this case, these ports should not be configured to perform Rx/Tx operations. This also fixes an issue when flooded frames were also switched to disabled ports and frames start to accumulate, consuming memory and eventually causing head-of-line blocking for other frames. Signed-off-by: Codrin Ciubotariu <codrin.ciubotariu@nxp.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * fsl: esdhc: consolidate fsl_esdhc_cfg structurePeng Fan2016-04-061-5/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can use phys_addr_to for esdhc_base to discard the #ifdef. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Yangbo Lu <yangbo.lu@nxp.com> Cc: Eric Nelson <eric@nelint.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * fsl: esdhc: support driver modelPeng Fan2016-04-061-40/+213
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support Driver Model for fsl esdhc driver. 1. Introduce a new structure struct fsl_esdhc_priv 2. Refactor fsl_esdhc_initialize which is originally used by board code. - Introduce fsl_esdhc_init to be common usage for DM and non-DM - Introduce fsl_esdhc_cfg_to_priv to build the bridge for non-DM part. - The original API for board code is still there, but we use 'fsl_esdhc_cfg_to_priv' and 'fsl_esdhc_init' to serve it. 3. All the functions are changed to use 'struct fsl_esdhc_priv', except fsl_esdhc_initialize. 4. Since clk driver is not implemented, use mxc_get_clock to geth the clk and fill 'priv->sdhc_clk'. Has been tested on i.MX6UL 14X14 EVK board: " =>dm tree .... simple_bus [ + ] | `-- aips-bus@02100000 mmc [ + ] | |-- usdhc@02190000 mmc [ + ] | |-- usdhc@02194000 .... => mmc list FSL_SDHC: 0 (SD) FSL_SDHC: 1 (SD) " Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: York Sun <york.sun@nxp.com> Cc: Yangbo Lu <yangbo.lu@nxp.com> Cc: Hector Palacios <hector.palacios@digi.com> Cc: Eric Nelson <eric@nelint.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Pantelis Antoniou <panto@antoniou-consulting.com> Cc: Simon Glass <sjg@chromium.org> Tested-By: Eric Nelson <eric@nelint.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | kirkwood_nand: claim MPP pins on the flyChris Packham2016-04-061-0/+19
| | | | | | | | | | | | | | | | | | | | | | Claim the MPP pins for the NAND flash controller only when it's actually being used. This allows the pins to be shared with the SPI interface which already supports an equivalent on-access MPP reconfiguration. Reviewed-by: Mark Tomlinson <mark.tomlinson@alliedtelesis.co.nz> Signed-off-by: Chris Packham <judge.packham@gmail.com> Acked-by: Scott Wood <oss@buserror.net> Signed-off-by: Stefan Roese <sr@denx.de>
* | spi: kirkwood_spi: Add support for multiple chip-selects on MVEBUStefan Roese2016-04-062-5/+26
|/ | | | | | | | | | | | | Currently only chip-select 0 is supported by the kirkwood SPI driver. The Armada XP / 38x SoCs also use this driver and support multiple chip selects. This patch adds support for multiple CS on MVEBU. The register definitions are restructured a bit with this patch. Grouping them to the corresponding registers. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Reviewed-by: Jagan Teki <jteki@openedev.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2016-04-0427-318/+1962
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| * ARM64: zynqmp: Enable EFI partition supportMichal Simek2016-04-041-0/+1
| | | | | | | | | | | | Enable EFI partition support for ZynqMP. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: zynq_gem: Add SGMII support for zynqMPSiva Durga Prasad Paladugu2016-04-041-2/+11
| | | | | | | | | | | | | | | | | | PCS auto negotaiation bit should be enabled along with SGMII autonegotation enabled in phy. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: phy: Add SGMII support for TI phySiva Durga Prasad Paladugu2016-04-041-1/+38
| | | | | | | | | | | | | | | | | | Add support of SGMII to TI phy dp838367 Enable the SGMII and PCS settings in phy control, CFG2 and BIST registers Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: zynq_gem: Return error incase of invalid phy addressSiva Durga Prasad Paladugu2016-04-041-3/+1
| | | | | | | | | | | | | | | | Return error from probe in case of invalid phy address. This fixes the issue of uboot crash if phy is not detected. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Add uEnv.txt supportMichal Simek2016-04-041-0/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | | preboot macro load the uEnv.txt from mmc 0 when bootmode is mmc. uenvcmd is executed after load of uEnv.txt if it is defined in the uEnv.txt env text file. The default importbootenv macro reads the uEnv.txt from mmc. Additional to this, usb_loadbootenv is added to support loading uEnv.txt from usb dev 0. Signed-off-by: Jason Wu <jason.wu.misc@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Enable FLASH_BAR for microzed and zyboMichal Simek2016-04-042-0/+2
| | | | | | | | | | | | Enable FLASH_BAR for these targets to be in sync with all zynq boards. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * block: Add support for Ceva sataMichal Simek2016-04-044-1/+119
| | | | | | | | | | | | | | Initial Ceva Sata init code. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * ARM64: zynqmp: Simplify MAINTAINERS file to support more boardsMichal Simek2016-04-041-4/+3
| | | | | | | | | | | | Handle all Xilinx ZynqMP boards with one fragment. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Read RAM information from DTMichal Simek2016-04-043-8/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Read information about memory from DT. This patch simplify life with synchronization between DT and board files. dram_init() only needs maximum RAM size below 4GB that's why please sort banks in memory node. dram_init_banksize() copies memory setup to bi_dram[]. This will avoid reading information from DT twice. Memory test start/end were changed to DDR location to let memtest still compiled. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: Move HUSH enabling from board file to defconfigMichal Simek2016-04-042-1/+1
| | | | | | | | | | | | Simplify board config file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Select SYS_CONFIG_NAME via KconfigMichal Simek2016-04-042-9/+7
| | | | | | | | | | | | | | | | | | This option enable adding new platform suport just by adding defconfig and DTS file which will target generic configuration for SoC. Make no sense to extend Kconfig just create a pointer between DTS and configuration file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Enable FAT write and EXT4 write for USB tooMichal Simek2016-04-041-0/+3
| | | | | | | | | | | | Enabling writing files to FAT and EXT4 for USB. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Decrease boot delaySoren Brinkmann2016-04-041-1/+1
| | | | | | | | | | | | | | Synchronize it with zynq platform. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: axi_emac: Report phy-node error message permanentlyMichal Simek2016-04-041-1/+1
| | | | | | | | | | | | Do not use debug() when printing error message. Use printf instead. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Remove !OF_CONTROL code for timer and interruptMichal Simek2016-04-044-45/+1
| | | | | | | | | | | | OF_CONTROL is enabled by default that's why this is dead code. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * microblaze: Read information about timer/interrupts from DTMichal Simek2016-04-042-1/+63
| | | | | | | | | | | | | | Read information about timer and interrupts from DT. This is the first small step to move timer and intc to DM. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Fix default ps7_init_gpl.c/h for ZYBOMichal Simek2016-04-042-244/+1342
| | | | | | | | | | | | | | | | | | There is incorrect setting for USB which didn't work with origin ps7_init_gpl.X files. Use default setting for Digilent Zybo projects with HDMI in PL. Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: zybo: Enabling reading MAC address from EEPROMMichal Simek2016-04-041-0/+3
| | | | | | | | | | | | | | Zybo has on board I2C EEPROM which contains preprogrammed MAC address. Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: gem: Allow to set the MAC from an EEPROMJoe Hershberger2016-04-043-0/+33
| | | | | | | | | | | | | | | | | | | | Provide board specific option how to read MAC address from ROM. Do it in generic way to be reusable by differnet boards. If this is not enough board specific functions can be created. Signed-off-by: Joe Hershberger <joe.hershberger@gmail.com> # driver part Signed-off-by: Michal Simek <monstr@monstr.eu> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Enable option to overwrite default variablesMichal Simek2016-04-041-0/+2
| | | | | | | | | | | | Enable overwriting variables out of main config file. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: xilinx_axi: Clear Isolate bit if found during phy setupSiva Durga Prasad Paladugu2016-04-041-1/+19
| | | | | | | | | | | | | | | | | | | | In SGMII cases the isolate bit might set after DMA and ethernet resets and hence check and clear during setup_phy if it was set. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: xilinx_axi: Use interface type instead of zeroSiva Durga Prasad Paladugu2016-04-041-1/+1
| | | | | | | | | | | | | | | | | | Pass appropriate interface type to phy_connect instead of zero. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * zynq-common: Enable phy driver for Xilinx PCS/PMA coreSiva Durga Prasad Paladugu2016-04-041-0/+1
| | | | | | | | | | | | | | Add support of Xilinx PCS/PMA core phy for Zynq Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * net: zynq_gem: Add support for SGMII interfaceSiva Durga Prasad Paladugu2016-04-041-7/+19
| | | | | | | | | | | | | | | | Add support of SGMII interface for zynq GEM. Read xlnx,emio property from DT. Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * phy: Add phy driver support for xilinx PCS/PMA coreSiva Durga Prasad Paladugu2016-04-044-0/+149
| | | | | | | | | | | | | | | | Add phy driver support for xilinx PCS/PMA core Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Kedareswara rao Appana <appanad@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Merge git://www.denx.de/git/u-boot-marvellTom Rini2016-04-0423-9/+5473
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| * | arm: mvebu: Don't enable d-cache on A375Stefan Roese2016-04-041-2/+9
| | | | | | | | | | | | | | | | | | | | | | | | Armada 375 still has some problems with d-cache enabled in the ethernet driver (mvpp2). So lets keep the d-cache disabled until this is solved. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
| * | arm: mvebu: Add basic support for Armada 375 eval board db-88f6720Stefan Roese2016-04-0411-2/+1151
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic support for the Marvell A375 eval board. Tested are the following interfaces: - I2C - SPI - SPI NOR - Ethernet (mvpp2), port 0 & 1 Currently the A375 SerDes and DDR3 init code is not intergrated. So the SPL U-Boot is not fully functional. Right now, this A375 mainline U-Boot can only be used by chainloading it via the original Marvell U-Boot. This can be done via this command: => tftpboot 00800000 a375/u-boot-dtb.bin;go 00800000 Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
| * | arm: mvebu: Add basic support for the Marvell Armada 375 SoCStefan Roese2016-04-046-5/+92
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds basic support for the Armada 375. Please note that currently the SerDes and DDR3 init code for the A375 is not included / enabled. This will be done in a later, follow-up patch. Right now, this A375 mainline U-Boot can only be used by chainloading it via the original Marvell U-Boot. This can be done via this command: => tftpboot 00800000 a375/u-boot-dtb.bin;go 00800000 Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
| * | dt-bindings: Add include/dt-bindings/phy/phy.h from Linux v4.4Stefan Roese2016-04-041-0/+19
| | | | | | | | | | | | | | | | | | | | | This will be needed by the upcoming Marvell Armada 375 dts files. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr>
| * | net: mvpp2.c: Add Marvell mvpp2 network driver for Armada 375Stefan Roese2016-04-044-0/+4201
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for the mvpp2 ethernet controller which is integrated in the Marvell Armada 375 SoC. This port is based on the Linux driver (v4.4), which has been stripped of the in U-Boot unused portions. Tested on the Marvell Armada 375 eval board db-88f6720. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Acked-by: Joe Hershberger <joe.hershberger@gmail.com>
| * | spi: kirkwood_spi.c: Add compatible match ID for Armada 375Stefan Roese2016-04-041-0/+1
| |/ | | | | | | | | | | | | | | This enables this driver for the Marvell Armada 375 SoC. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Luka Perkov <luka.perkov@sartura.hr> Reviwer-by: Jagan Teki <jteki@openedev.com>
* | common: cli: Fix typo CONFIG_CMDINE -> CONFIG_CMDLINEStefan Roese2016-04-041-1/+1
|/ | | | | | | | | | Patch f8bb6964 (Drop command-processing code when CONFIG_CMDLINE is disabled) introduced a small typo. This patch fixes it and unbreaks all boards again that don't have the Hush parser enabled. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com>
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