| Commit message (Collapse) | Author | Age | Files | Lines |
|---|
| ... | |
| | | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
rename to fdt_path_offset
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
Fix the definitions of CFG_ENV_ADDR and CFG_ENV_SECT_SIZE for 837x.
This change guarantees that the environment will be located on the
first flash sector after the U-Boot image.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
u-boot itself uses GMII mode on the 8360. Fix up UCC phy-connection-type
properties in the device tree so the PHY gets configured for internal delay on
RX only by the OS, as prescribed by mpc8360 rev. 2.1 pb mds erratum #2.
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
update the CREDITS and MAINTAINERS.
Signed-off-by: Dave Liu <daveliu@freescale.com>
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
Add the MAINTAINER and MAKEALL entries for mpc837xemds
Signed-off-by: Dave Liu <daveliu@freescale.com>
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
Add the README.mpc837xemds to /doc
Signed-off-by: Dave Liu <daveliu@freescale.com>
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
The MPC837xEMDS board support:
* DDR2 400MHz hardcoded and SPD init
* Local bus NOR Flash
* I2C, UART, MII and RTC
* eTSEC RGMII
* PCI host
Signed-off-by: Dave Liu <daveliu@freescale.com>
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
The MPC8315E SoC including e300c3 core and new IP blocks,
such as TDM, PCI Express and SATA controller.
Signed-off-by: Dave Liu <daveliu@freescale.com>
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
The MPC837x SoC including e300c4 core and new IP blocks,
such as SDHC, PCI Express and SATA controller.
Signed-off-by: Dave Liu <daveliu@freescale.com>
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
Despite user manual, BCSR9.7 is negated (high) on HRST, so
UART2 is disabled. Fix that and configure QE pins properly.
Signed-off-by: Anton Vorontsov <avorontsov@ru.mvista.com>
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
Fix the definitions of CFG_ENV_ADDR and CFG_ENV_SECT_SIZE for all of the
currently-defined 83xx boards. This change guarantees that the environment
will be located on the first flash sector after the U-Boot image.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
|
| |\ \ \ \ \ \ |
|
| | | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
ext2fs_read_file() had the function arguments swapped.
Pointed out by Mike Montour, 19 Dec 2007 22:34:25 -0800
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
| | | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
The MPC5200 OHCI controller operates in big endian, so
CFG_OHCI_BE_CONTROLLER must be defined for it to work properly.
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
|
| | | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
Signed-off-by: Wolfgang Denk <wd@denx.de>
|
| | | |/ / / /
| |/| | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
This patch updates the fw_printenv/fw_setenv userspace tool to include
the correct MTD header in order to compile against current kernel
headers. Backward compatibility is preserved by introducing an option
MTD_VERSION which can be set to "old" for compilation using the old MTD
headers. Along with this a number of warnings are fixed.
Signed-off-by: Markus Klotzbuecher <mk@denx.de>
|
| |\ \ \ \ \ \ |
|
| | | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
On LWMON5 we now use d-cache as init-ram and stack. The SPR POST test uses
self modifying code and this doesn't work with stack in d-cache, since
I can't move the code from d-cache to i-cache. We move the SPR test to
be executed a little later, after relocation. Then stack is located in
SDRAM and this self-modifying code is no problem anymore.
Signed-off-by: Stefan Roese <sr@denx.de>
|
| | | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
This patch configures the LWMON5 port to use d-cache as init-ram and
the unused GPT0_COMP6 as POST WORD storage.
Signed-off-by: Stefan Roese <sr@denx.de>
|
| | | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
The privious 4xx POST implementation only supported storing the POST
WORD in OCM. Since we need to reserve the OCM on LWMON5 for the logbuffer
we need to store the POST WORD in some other non volatile location.
This patch adds CFG_POST_ALT_WORD_ADDR to specify an address for such
a location.
Signed-off-by: Stefan Roese <sr@denx.de>
|
| | | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
This patch adds support for locking the init-ram/stack in d-cache,
so that other regions may use d-cache as well
Note, that this current implementation locks exactly 4k of d-cache,
so please make sure that you don't define a bigger init-ram area. Take
a look at the lwmon5 440EPx implementation as a reference.
Signed-off-by: Stefan Roese <sr@denx.de>
|
| | | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
Some operating systems rely on assigned PCI interrupts.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
|
| | | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
This patch allows the use of 4xx interrupt vector number defines
in board specific code outside cpu/ppc4xx.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
|
| | | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
|
| | | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
This patch updates the PLB/PCI divider when running at
400MHz CPU frequency from 4 to 3 which results in 44MHz PCI sync clock.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
|
| | | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
Add CFG_NAND_QUIET_TEST option to disable error message when
no NAND chip is installed on PMC440 boards.
Disable a couple of config defines that are only used for NAND_U_BOOT.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
|
| | |/ / / / /
|/| | | | |
| | | | | |
| | | | | | |
Signed-off-by: Stefan Roese <sr@denx.de>
|
| |\ \ \ \ \ \
| |_|/ / / /
|/| | | | | |
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
Disabled and remove inka4x0 custom flash driver, use CFI flash
driver instead.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
Add support for three new DDR chips that may be present on a NG
INKA4x0 hardware: HYB25D512160BF-5, K4H511638C-7CB3, T46V32M16BN-6IT.
Cleanup board/inka4x0/mt48lc16m16a2-75.h file.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
|
| | | |/ / /
| |/| | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
- Cleanup compile warnings.
- Add missing '\0' in default environment.
- Increase CFG_MONITOR_LEN to 256 KiB.
- Add required CFG_USE_PPCENV.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
|
| |\ \ \ \ \ |
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
Now that there are no board-specific versions of
"denali_core_search_data_eye()", the weak binding on the common version
can be removed.
Signed-off-by: Larry Johnson <lrj@acm.org>
|
| | |\ \ \ \ \ |
|
| | | | | | | |
| | | | | | |
| | | | | | |
| | | | | | | |
Signed-off-by: Stefan Roese <sr@denx.de>
|
| | | | |_|_|/
| | |/| | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
On Katmai the complete auto-calibration somehow doesn't seem to
produce the best results, meaning optimal values for RQFD/RFFD.
This was discovered by GDA using a high bandwidth scope,
analyzing the DDR2 signals. GDA provided a fixed value for RQFD,
so now on Katmai "only" RFFD is auto-calibrated.
This patch also adds RDCC calibration as mentioned on page 7 of
the AMCC PowerPC440SP/SPe DDR2 application note:
"DDR1/DDR2 Initialization Sequence and Dynamic Tuning"
Signed-off-by: Stefan Roese <sr@denx.de>
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | | |
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | | |
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | | |
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
The Sequoia NAND booting target now uses the recently extracted
cpu/ppc4xx/denali_data_eye.c file too.
Signed-off-by: Stefan Roese <sr@denx.de>
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | | |
Signed-off-by: Larry Johnson <lrj@acm.org>
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
Note: this patch changes the configuration of some GPIO registers:
Register Old Value New Value
--------------- ---------- ----------
DCR GPIO0_TCR 0x0000000F 0x0000F0CF
DCR GPIO0_TSRH 0x55005000 0x00000000
DCR GPIO1_TCR 0xC2000000 0xE2000000
DCR GPIO1_TSRL 0x0C000000 0x00200000
DCR GPIO1_ISR2L 0x00050000 0x00110000
Signed-off-by: Larry Johnson <lrj@acm.org>
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
This patch makes two additions to GPIO support:
First, it adds function gpio_read_in_bit() to read the a bit from the
GPIO Input Register (GPIOx_IR) in the same way that function
gpio_read_out_bit() reads a bit from the GPIO Output Register
(GPIOx_OR).
Second, it modifies function gpio_set_chip_configuration() to provide
an additional option for configuring the GPIO from the
"CFG_4xx_GPIO_TABLE".
According to the 440EPx User's Manual, when an alternate output is used,
the three-state control is configured in one of two ways, depending on
the particular output. The first option is to select the corresponding
alternate three-state control in the GPIOx_TRSH/L registers. The second
option is to select the GPIO Three-State Control Register (GPIOx_TCR) in
the GPIOx_TRSH/L registers, and set the corresponding bit in the
GPIOx_TCR register to enable the output. For example, the Manual
specifies configuring the GPIO00 Alternate 1 Signal (PreAddr07) to use
the alternate three-state control (first option), and specifies
configuring the GPIO32 Alternate 1 Signal (USB2OM0) with the output
enabled in the GPIOx_TCR register (second option).
Currently, gpio_set_chip_configuration() configures all alternate signal
outputs to use the first option. This patch allow the second option to
be selected by setting the "out_val" element in the table entry to
"GPIO_OUT_1". The first option is used when the "out_val" element is
set to "GPIO_OUT_0". Because "out_val" is not currently used when an
alternate signal is selected, and because all current GPIO tables set
"out_val" to "GPIO_OUT_0" for all alternate signals, this patch should
not change any existing configurations.
Signed-off-by: Larry Johnson <lrj@acm.org>
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
These definitions are now in "include/ppc440.h".
Signed-off-by: Larry Johnson <lrj@acm.org>
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
This patch also modifies the functionality of the code so that the data-eye
search is now done with with the cache disabled.
Signed-off-by: Larry Johnson <lrj@acm.org>
|
| | | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | |
| | | | | | |
These definitions are now in "include/ppc440.h".
Signed-off-by: Larry Johnson <lrj@acm.org>
|
| | |/ / / /
| | | | |
| | | | |
| | | | | |
Signed-off-by: Larry Johnson <lrj@acm.org>
|
| | | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
When CONFIG_NET_DO_NOT_TRY_ANOTHER is defined U-Boot's
networking stack does not automatically switch to
another interface. This patch does not touch the default
behavior.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
|
| | | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
This patch modifies the return code handling in the eth_init()
function, to be compatible with the handling of the return codes in
the other network stack files. It now returns a 0 on Success and -1 on
error.
Signed-off-by: Upakul Barkakaty <upakul.barkakaty@conexant.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
|
| | | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | |
| | | | | |
Assigning the output of simple_strtoul(CB:A9:87:65:43:21) to `char', we are
warned as below:
U-Boot 1.2.0 (Aug 30 2007 - 08:27:37)
DRAM: 256 MB
Flash: 32 MB
In: serial
Out: serial
Err: serial
Net: NEC-Candy
Warning: NEC-Candy MAC addresses don't match:
Address in SROM is 00:00:4C:80:92:A2
Address in environment is FFFFFFCB:FFFFFFA9:FFFFFF87:65:43:21
This patch changes env_enetaddr type from `char' to `unsigned char'.
Cc: Masaki Ishikawa <ishikawa-masaki@cnt.mxe.nes.nec.co.jp>
Signed-off-by: Shinya Kuribayashi <shinya.kuribayashi@necel.com>
Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
|
