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| * | dm: part: Convert partition API use to linker listsSimon Glass2016-03-147-173/+162
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We can use linker lists instead of explicitly declaring each function. This makes the code shorter by avoiding switch() statements and lots of header file declarations. While this does clean up the code it introduces a few code issues with SPL. SPL never needs to print partition information since this all happens from commands. SPL mostly doesn't need to obtain information about a partition either, except in a few cases. Add these cases so that the code will be dropped from each partition driver when not needed. This avoids code bloat. I think this is still a win, since it is not a bad thing to be explicit about which features are used in SPL. But others may like to weigh in. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Stephen Warren <swarren@nvidia.com>
| * | dm: sandbox: Enable all partition typesSimon Glass2016-03-141-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | It is useful to have sandbox build as much code as possible to avoid having to build every board to detect build errors. Also we may add tests for some more partition types at some point. Enable all partition types in sandbox. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com>
| * | dm: part: Add a cast to avoid a compiler warningSimon Glass2016-03-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | In part_amiga.c the name is unsigned but bcpl_strcpy() requires a signed pointer. Add a cast to fix the warning. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com>
| * | dm: blk: Rename get_device_and_partition()Simon Glass2016-03-1410-17/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Rename this function to blk_get_device_part_str(). This is a better name because it makes it clear that the function returns a block device and parses a string. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com>
| * | dm: blk: Rename get_device() to blk_get_device_by_str()Simon Glass2016-03-146-13/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current name is too generic. The function returns a block device based on a provided string. Rename it to aid searching and make its purpose clearer. Also add a few comments. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com>
| * | dm: blk: Rename get_dev() to blk_get_dev()Simon Glass2016-03-146-14/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | The current name is too generic. Add a 'blk_' prefix to aid searching and make its purpose clearer. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com>
| * | dm: blk: Add comments to a few functionsSimon Glass2016-03-141-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | The block interface is not well documented in the code. Pick two important functions and add comments. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com>
| * | dm: blk: Convert interface type to an enumSimon Glass2016-03-141-12/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since these are sequentially numbered it makes sense to use an enum. It avoids having to maintain the maximum value, and provides a type we can use if it is useful. In fact the maximum value is not used. Rename it to COUNT, since MAX suggests it is the maximum valid value, but it is not. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
| * | dm: Add a new header for block devicesSimon Glass2016-03-143-58/+74
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | At present block devices are tied up with partitions. But not all block devices have partitions within them. They are in fact separate concepts. Create a separate blk.h header file for block devices. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com>
| * | dm: part: Drop the common.h headerSimon Glass2016-03-141-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | We should not include <common.h> in header files. Each C file should include it if needed. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com>
| * | dm: fdtdec: Correct a sandbox build warningSimon Glass2016-03-141-2/+3
| | | | | | | | | | | | | | | | | | | | | Adjust the cast to avoid a warning when stdint.h is used. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
| * | dm: part: Correct a sandbox build warningSimon Glass2016-03-141-4/+6
| | | | | | | | | | | | | | | | | | | | | Adjust the cast to avoid a warning when stdint.h is used. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
| * | dm: pci: Break out the common region display codeSimon Glass2016-03-141-34/+17
| | | | | | | | | | | | | | | | | | | | | | | | Each region is displayed in almost the same way. Break out this common code into its own function. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com>
| * | dm: Drop the block_dev_desc_t typedefSimon Glass2016-03-1466-331/+338
| | | | | | | | | | | | | | | | | | | | | | | | | | | Use 'struct' instead of a typdef. Also since 'struct block_dev_desc' is long and causes 80-column violations, rename it to struct blk_desc. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Stephen Warren <swarren@nvidia.com>
| * | debug_uart: output CR along with LFMasahiro Yamada2016-03-141-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | The serial output from the debug UART carries on going far to the right in the console. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Stefan Roese <sr@denx.de> Reviewed-by: Simon Glass <sjg@chromium.org>
| * | dm: core: make simple-bus compatible to simple-mfdMasahiro Yamada2016-03-141-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Simple MFD devices can bind children without special bus configuration. Like Linux, let's handle "simple-mfd" in the same way as "simple-bus". Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | dm: Use uclass_first_device_err() where it is usefulSimon Glass2016-03-1417-54/+30
| | | | | | | | | | | | | | | | | | Use this new function in places where it simplifies the code. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | dm: core: Add uclass_first_device_err() to return a valid deviceSimon Glass2016-03-142-2/+26
| |/ | | | | | | | | | | | | | | A common pattern is to call uclass_first_device() and then check if it actually returns a device. Add a new function which does this, returning an error if there are no devices in that uclass. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Merge git://git.denx.de/u-boot-marvellTom Rini2016-03-141-3/+3
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| * | ARM: sheevaplug: drop unneded 'usb start' from boot commandPeter Korsgaard2016-03-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | The default bootcommand executes x_bootcmd_usb AFTER loading a kernel from nand and just before executing it, which only slows down boot without adding any functionality - So drop it. Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
| * | ARM: sheevaplug: unbreak kernel bootargs / mtdparts command by dropping ↵Peter Korsgaard2016-03-141-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | double mtdparts= Commit 1e3d640316 (ARM: sheevaplug: redefine MTDPARTS) prepended mtdparts= to the flash partition information in CONFIG_MTDPARTS, but it is used like "mtdparts=" CONFIG_MTDPARTS - So we end up passing mtdparts=mtdparts=.. to the kernel, confusing the cmdline partition parser. Fix it by dropping the double 'mtdparts='. Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
| * | ARM: sheevaplug: unbreak default environmentPeter Korsgaard2016-03-141-1/+1
| |/ | | | | | | | | | | | | | | | | | | | | Commit 1e3d640316 (ARM: sheevaplug: redefine MTDPARTS) changed the mtdparts part of the default environment, but dropped the trailing zero termination - So the definition of x_bootcmd_kernel becomes part of the x_bootargs variable. Fix it by reintroducing the zero termination. Signed-off-by: Peter Korsgaard <peter@korsgaard.com>
* | arm64: define _image_binary_end to fix SPL_OF_CONTROLMasahiro Yamada2016-03-141-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To make SPL_OF_CONTROL work on ARM64 SoCs, _image_binary_end must be defined in the linker script. LD spl/u-boot-spl lib/built-in.o: In function `fdtdec_setup': lib/fdtdec.c:1186: undefined reference to `_image_binary_end' lib/fdtdec.c:1186: undefined reference to `_image_binary_end' make[1]: *** [spl/u-boot-spl] Error 1 make: *** [spl/u-boot-spl] Error 2 Note: CONFIG_SPL_SEPARATE_BSS must be defined as well on ARM64 SoCs. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: DRA72-evm: Update mux and VIRTUAL/MANUAL mode timingsLokesh Vutla2016-03-142-134/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | All the mux configurations needs to be done as part of the IODelay sequence to avoid glitch. Adding all the mux configuration, MANUAL/VIRTUAL mode configuration as needed for DRA72-evm. Also update the mux for SD card detect on DRA74-evm. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: DRA7-evm: Update memory info in banksLokesh Vutla2016-03-141-0/+14
| | | | | | | | | | | | | | | | | | | | Updating the memory banks properly so that DT is populated accordingly. And updating this only after DDR is properly detected by eeprom, so that git bisect is still maintained. Acked-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ARM: DRA7: EMIF: Add 4GB DDR settingsLokesh Vutla2016-03-141-3/+80
| | | | | | | | | | | | | | | | | | | | The REVH and later versions of DRA7-evm uses MICRON MT41K512M16HA-125 memory chips which is of size 4GB(2GB on EMIF1 and 2GB on EMIF2). Add support for the same. Acked-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ARM: DRA7: configs: Prepare for detecting memory > 2GBLokesh Vutla2016-03-141-0/+5
| | | | | | | | | | | | | | Enable configs that are required for detecting memory > 2GB. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ARM: DRA7: Move emif settings to board specific filesLokesh Vutla2016-03-142-147/+131
| | | | | | | | | | | | | | | | | | | | The newer versions of DRA7 boards has EEPROM populated with DDR size specified in it. Moving DRA7 specific emif related settings to board files so that emif settings can be identified based on EEPROM. Acked-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ARM: DRA7: Enable EEPROM supportLokesh Vutla2016-03-144-4/+63
| | | | | | | | | | | | | | | | Enable EEPROM support for DRA74-evm. Acked-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ti: common: dra7: Add standard access for board description EEPROMLokesh Vutla2016-03-142-0/+120
| | | | | | | | | | | | | | | | | | | | DRA7 EVM revH and later EVMs have EEPROM populated that can contain board description information such as name, revision, DDR definition, etc. Adding support for this EEPROM format. Acked-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ARM: AM57xx: Update EMIF registersLokesh Vutla2016-03-141-71/+65
| | | | | | | | | | | | | | | | There are certain EMIF timing failures seen on the some x15 boards. Updating the EMIF settings to get rid of these timing failures. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
* | ARM: Various: Future-proof serial platdataAdam Ford2016-03-149-31/+31
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A few boards still use ns16550_platdata structures, but assume the structure is going to be in a specific order. By explicitly naming each entry, this should also help 'future-proof' in the event the structure changes. Tested on the Logic PD Torpedo + Wireless. I only changed a handful of devices that used the same syntax as the Logic board. Appologies if I missed one or stepped on toes. Thanks to Derald Woods and Alexander Graf. Signed-off-by: Adam Ford <aford173@gmail.com> V6: Add fix to arch/arm/cpu/armv7/am33xx/board.c V5: Add fix to arch/arm/cpu/arm926ejs/lpc32xx/devices.c V4: Fix subject heading V3: Remove reg_offset out in all the structs. It was reverted out, and and if it did exist, it would get initialized to 0 by default. V2: I hastily copy-pasted the boards without looking at the UART number. This addresses 3 boards that use UART3 and not UART1. Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | ARM: OMAP4+: Allow arch specfic code to use early DMLokesh Vutla2016-03-141-9/+21
| | | | | | | | | | | | | | | | | | | | | | Early system initialization is being done before initf_dm is being called in U-Boot. Then system will fail to boot if any of the DM enabled driver is being called in this system initialization code. So, rearrange the code a bit so that DM enabled drivers can be called during early system initialization. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: DRA7: emif: Enable interleaving for higher address spaceLokesh Vutla2016-03-142-0/+5
| | | | | | | | | | | | | | | | Given that DRA7/OMAP5 SoCs can support more than 2GB of memory, enable interleaving for this higher memory to increase performance. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: DRA7: emif: Check for enable bits before updating leveling outputLokesh Vutla2016-03-143-24/+54
| | | | | | | | | | | | | | | | | | Read and write leveling can be enabled independently. Check for these enable bits before updating the read and write leveling output values. This will allow to use the combination of software and hardware leveling. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: DRA7: emif: Fix DDR init sequence during warm resetLokesh Vutla2016-03-141-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Commit (20fae0a - ARM: DRA7: DDR: Enable SR in Power Management Control) enables Self refresh mode by default and during warm reset the EMIF contents are preserved. After warm reset EMIF sees that it is idle and puts DDR in self-refresh. When in SR, leveling operations cannot be done as DDR can only accept SR exit command, so its hanging during warm reset. In order to fix this reset the power management control register before EMIF initialization if it is a warm reset. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: DRA7: emif: Fix updating of refresh ctrl shadowLokesh Vutla2016-03-141-1/+5
| | | | | | | | | | | | | | | | On DRA7, refresh ctrl shadow should be updated with the final value. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | dm: omap_timer: Fix conversion of address to a pointerLokesh Vutla2016-03-141-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | OMAP timer driver directly typecasts fdt_addr_t to a pointer. This is not strictly correct, as it gives a build warning when fdt_addr_t is u64. So, use map_physmem for a proper typecasts. This is inspired by commit 167efe01bc5a9 ("dm: ns16550: Use an address instead of a pointer for the uart base") Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: keystone2: use detected ddr3a sizeVitaly Andrianov2016-03-144-3/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because KS2 u-boot works in 32 bit address space the existing ram_size global data field cannot be used. The maximum, which the get_ram_size() can detect is 2GB only. The ft_board_setup() needs the actual ddr3 size to fix up dtb. This commit introduces the ddr3_get_size() which uses SPD data to calculate the ddr3 size. This function replaces the "ddr3_size" environment variable, which was used to get the SODIMM size. For platforms, which don't have SODIMM with SPD and ddr3 is populated to a board a simple ddr3_get_size function that returns ddr3 size has to be implemented. See hardware-k2l.h Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: keystone2: use SPD info to configure K2HK and K2E DDR3Vitaly Andrianov2016-03-1410-260/+529
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit replaces hard-coded EMIF and PHY DDR3 configurations for predefined SODIMMs to a calculated configuration. The SODIMM parameters are read from SODIMM's SPD and used to calculated the configuration. The current commit supports calculation for DDR3 with 1600MHz and 1333MHz only. Signed-off-by: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: keystone2: K2G: Add support for different arm/device speedsLokesh Vutla2016-03-144-8/+57
| | | | | | | | | | | | | | | | | | | | The maximum device and arm speeds can be determined by reading EFUSE_BOOTROM register. As there is already a framework for reading this register, adding support for all possible speeds on k2g devices. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: keystone2: Allow for board specific speed definitionsLokesh Vutla2016-03-145-13/+13
| | | | | | | | | | | | | | | | | | | | Its not compulsory that speed definition should be same on EFUSE_BOOTROM register for all keystone 2 devices. So, allow for board specific speed definitions. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: keystone2: K2G: power-off DSP during bootSuman Anna2016-03-141-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | The DSPs are powered on by default upon a Power ON reset, and they are powered off on current Keystone 2 SoCs - K2HK, K2L, K2E during the boot in u-boot. This is not functional on K2G though. Extend the existing DSP power-off support to the only DSP present on K2G. Do note that the PSC clock domain module id for DSP on K2G differs from that of previous Keystone2 SoCs. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | ARM: keystone2: Use macro for DSP GEM power domainSuman Anna2016-03-142-1/+2
| | | | | | | | | | | | | | | | | | | | Define a macro for the DSP GEM power domain id number and use it instead of a hard-coded number in the code that disables all the DSPs on various Keystone2 SoCs. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Nishanth Menon <nm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | include/crc.h: Remove unreferenced cyg_xxx() prototypesStefan Roese2016-03-141-26/+0
| | | | | | | | | | | | | | | | These cyg_ prototypes are not referenced anywhere in current mainline U-Boot. So lets remove them. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* | lib/crc16.c: Rename cyg_crc16() to crc16_ccitt() and add crc start valueStefan Roese2016-03-144-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | The original name of this function is unclear. This patch renames this CRC16 function to crc16_ccitt() matching its name with its implementation. To make the usage of this function more flexible, lets add the CRC start value as parameter to this function. This way it can be used by other functions requiring different start values than 0 as well. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* | lib/crc16.c: Coding-style cleanupStefan Roese2016-03-141-41/+40
| | | | | | | | | | | | | | lib/crc16.c is changed to match the common U-Boot coding-style. Signed-off-by: Stefan Roese <sr@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* | common: image-fit: Fix load and entry addresses in FIT imageYork Sun2016-03-141-5/+17
| | | | | | | | | | | | | | | | FIT image supports more than 32 bits in addresses by using #address-cell field. Fixing 64-bit support by using this field. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | common: image-fit: Use a common function to get addressYork Sun2016-03-141-23/+19
| | | | | | | | | | | | | | | | FIT image supports load address and entry address. Getting these addresses can use a common function. Signed-off-by: York Sun <york.sun@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | arm: Add support for LEGO MINDSTORMS EV3David Lechner2016-03-1410-0/+518
| | | | | | | | | | | | | | | | | | | | | | | | This is based on the davinci da850evm. It can boot from either the on-board 16MB flash or from a microSD card. It also reads board information from an I2C EEPROM. The EV3 itself initally boots from write-protected EEPROM, so no u-boot SPL is needed. Signed-off-by: David Lechner <david@lechnology.com> Reviewed-by: Tom Rini <trini@konsulko.com>
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