| Commit message (Collapse) | Author | Age | Files | Lines |
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Some systems have so much RAM that the end of RAM is beyond 4GB. An
example would be a Tegra124 system (where RAM starts at 2GB physical)
that has more than 2GB of RAM.
In this case, we want gd->ram_size to represent the actual RAM size, so
that the actual RAM size is passed to the OS. This is useful if the OS
implements LPAE, and can actually use the "extra" RAM.
However, we can't use get_ram_size() to verify the actual amount of RAM
present on such systems, since some of the RAM can't be accesses, which
confuses that function. Avoid calling get_ram_size() when the RAM size
is too large for it to work correctly. It's never actually needed anyway,
since there's no reason for the BCT to report the wrong RAM size.
In systems with >=4GB RAM, we still need to clip the reported RAM size
since U-Boot uses a 32-bit variable to represent the RAM size in bytes.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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size_mb is used to hold a value that's sometimes KB, sometimes MB,
and sometimes bytes. Use separate correctly named variables to avoid
confusion here. Also fix indentation of a conditional statement.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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Some systems have so much RAM that the end of RAM is beyond 4GB. An
example would be a Tegra124 system (where RAM starts at 2GB physical)
that has more than 2GB of RAM.
In this case, we can gd->ram_size to represent the actual RAM size, so
that the actual RAM size is passed to the OS. This is useful if the OS
implements LPAE, and can actually use the "extra" RAM.
However, U-Boot does not implement LPAE and so must deal with 32-bit
physical addresses. To this end, we enhance board_get_usable_ram_top() to
detect the "over-sized" case, and limit the relocation addres so that it
fits into 32-bits of physical address space.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Tom Warren <twarren@nvidia.com>
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If CONFIG_ARMV7_PSCI is not defined and CONFIG_ARMV7_SECURE_BASE is defined,
smp_kicl_all_cpus may enable secondary cores and runs into secure_ram_addr(
_smp_pen), before code is relocated to secure ram.
So need relocation to secure ram before enable secondary cores.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
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Nowadays generic CFI code properly detects the ED Mini V2's
Macronix MC29LV400CB flash chip, therefore we can drop the
CONFIG_FLASH_CFI_LEGACY option and associated settings and code.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
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ED Mini V2 is based on Orion 5x which boots at fixed
address 0xFFFF0000 in NOR Flash. Place SPL there, and
switch U-Boot from .bin to .img format, stored in
NOR Flash at 0xFFF90000.
Note: this patch was tested on HW and works, i.e.
it boots U-Boot properly, but SPL console output
currently does not appear, due to GD being trashed
by arch/arm/lib/spl.c. This trashing is soon to be
removed, and then ED Mini V2 SPL console output will
become visible.
Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
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Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
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Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
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If we don't know the relocation address, the raw values are not very useful.
Show the pre-relocation values as well as these can be looked up in
System.map, etc.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
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This patch adds support for handling 828024 and 826974 erratas
for Cortex-A57 cores present on LS2085A SoC.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
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This patch adds basic constructs in the ARMv8 u-boot code
to handle and apply Cortex-A57 specific erratas.
As and example, the framework showcases how erratas 833069, 826974
and 828024 can be handled and applied.
Later on this framework can be extended to include other
erratas.
Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
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Fix a typo in board/sunxi/Kconfig which caused VIDEO_LCD_PANEL_I2C to be
enabled on all sunxi boards. Also fix a compile error which shows up once
VIDEO_LCD_PANEL_I2C is actually disabled on most boards as it should be.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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This patch add support for Wexler TAB7200 tablet.
The Wexler TAB7200 is a A20 based tablet with 7 inch display(800x480),
capacitive touchscreen(5 fingers), 1G RAM, 4G NAND, micro SD card slot,
mini HDMI port, 3.5mm audio plug, 1 USB OTG port and 1 USB 2.0 port.
Signed-off-by: Aleksei Mamlin <mamlinav@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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Use the AXP223 PMIC to detect VBUS for musb otg support.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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This enables the musb glue layer to use the AXP221's VBUS detection
function to check for VBUS. This fixes otg support on the A23 q8h
tablets.
Note that u-boot never calls musb_shutdown(), so once VBUS is enabled,
it is never disabled until the system is powered off, or the OS does
so. This can be used to our advantage to keep VBUS powered into the
OS, where support for AXP221 is not available yet.
Fixes: 52defe8f6570 ("sunxi: musb: Check Vbus-det before enabling otg port power")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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Some of the AXP PMICs support VBUS detection, i.e. checking whether
VBUS power input is available and usable (supplied by an external
source). A few boards use this instead of a separate GPIO to detect
VBUS on USB OTG.
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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The Orange Pi Mini is an A20 based development board featuring 1G RAM, HDMI,
1Gbit ethernet, USB wifi, SATA, 2 sdcard slots (use the top one for booting),
2 USB 2.0 A receptacles, a micro USB B receptacle (otg) and a 3 ring 3.5 mm
jack connector for A/V.
Also see: http://www.orangepi.org/
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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The Orange Pi is an A20 based development board featuring 1G RAM, HDMI & VGA,
1Gbit ethernet, USB wifi, SATA, 4 USB 2.0 A receptacles, a micro USB B
receptacle (otg) and a 3 ring 3.5 mm jack connector for A/V.
Also see: http://www.orangepi.org/
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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The Wits Pro A20 DKT is an A20 Development KiT with 1G RAM, 4G NAND, sdio wifi,
1Gbit ethernet, 1024x768 lcd screen with ft5x_ts touchscreen and a ton of
IO connectors.
Note there seem to be multiple sdcard slots on the board (4 in total), but
other then mmc0 none of these are hooked up by default, there is a ton of
dip-switches which likely allow hooking some of these up, but the documentation
of the board only describes the use of a fraction of them, so for now we
only support mmc0.
Also see: http://www.merrii.com/en/pla_d.asp?id=163
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
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The Forfun Q88DB is an A13 tablet in the common Q8 format.
Features are 512MB RAM, 4GB NAND, 7" Display, RTL8188 Wifi, 2 cameras.
For more details see: http://linux-sunxi.org/Forfun_Q88DB
Signed-off-by: Jens Lucius <info@jenslucius.com>
Acked-by: Ian Campbell <ijc@hellion.org.uk>
Signed-off-by: Ian Campbell <ijc@hellion.org.uk>
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The Mele I7 is a Allwinner based Android TV box.
It features a A31 SOC, 1G RAM, 8GB NAND, HDMI out, A/V out,
SPDIF, IrDA, 3 USB A, 1 USB micro OTG and Wireless LAN.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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The MK808C is a Allwinner based Android TV dongle.
It features a A20 SOC, 1G RAM, 8GB NAND, HDMI out, A/V out,
1 USB A, 1 USB mini OTG, Bluetooth and Wireless LAN.
Signed-off-by: Marcus Cooper <codekipper@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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The Jesurun Q5 has a black plastic casing with the approximate dimensions of
100mm x 100mm x 24mm with rounded edges. In terms of hardware it features an
Allwinner A10 SoC with 1GB RAM and 8GB of NAND flash. The storage capacity can
be extended up to 32GB with a MicroSD card. The external connectors are: 2x
USB-A female supporting USB2.0, 3.5mm female jack for audio, HDMI female,
SPDIF, RJ45 LAN and Power. In addition the device has 1x red LED (hard wired to
power) and an programmable green led. On the board there is also an unpopulated
IR receiver and the UART. The devices is equipped with an AXP209 PMU.
For more details see: http://linux-sunxi.org/Jesurun_Q5
Signed-off-by: Gábor Nyers <gnyers@opensuse.org>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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The tpr3 (timing skew) parameter is used in all supported versions of
the sunxi DRAM controller, but it was only enabled for sun4i in
47e3501a76894f4ba08bc61f33774bd5d39ff464.
Signed-off-by: Adam Sampson <ats@offog.org>
Acked-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Acked-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
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Added support to disable the start of application by using
a environment variable autostart
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
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While the Freescale ARMv8 board LS2085A will enter U-Boot both
on a master and a secondary (slave) CPU, this is not the common
behaviour on ARMv8 platforms. The norm is that U-Boot is entered
from the master CPU only, while the other CPUs are kept in
WFI (wait for interrupt) state.
The code determining which CPU we are running on is using the
MPIDR register, but the definition of that register varies with
platform to some extent, and handling multi-cluster platforms
(such as the Juno) will become cumbersome. It is better to only
enable the multiple entry code on machines that actually need
it and disable it by default.
Make the single entry default and add a special
ARMV8_MULTIENTRY KConfig option to be used by the
platforms that need multientry and set it for the LS2085A.
Delete all use of the CPU_RELEASE_ADDR from the Vexpress64
boards as it is just totally unused and misleading, and
make it conditional in the generic start.S code.
This makes the Juno platform start U-Boot properly.
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This fixes a regression of e310b93ec1, affecting Ethernet on the Jetson
TK1, e.g.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
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The way the PSCI DT update happens currently means we pull in
<asm/armv7.h> everywhere, including on ARMv8 and that in turn brings in
<asm/io.h> for some non-PSCI related things that header needs to deal
with.
To fix this, we rework the hook slightly. A good portion of
arch/arm/cpu/armv7/virt-dt.c is common looking and I hope that when PSCI
is needed on ARMv8 we can re-use this by and large. So rename the
current hook to psci_update_dt(), move the prototype to <asm/psci.h> and
add an #ifdef that will make re-use later easier.
Reported-by: York Sun <yorksun@freescale.com>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: York Sun <yorksun@freescale.com>
Cc: Ian Campbell <ijc@hellion.org.uk>
Cc: Hans de Goede <hdegoede@redhat.com>
Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
Signed-off-by: Tom Rini <trini@konsulko.com>
Acked-by: York Sun <yorksun@freescale.com>
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The dfu mmc file buffer, which was static, now is allocated
by memalign(), so the malloc pool len should be also increased.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Tom Warren <twarren.nvidia@gmail.com>
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The dfu mmc file buffer, which was static, now is allocated
by memalign(), so the malloc pool len should be also increased.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Tom Rini <trini@konsulko.com>
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The dfu mmc file buffer, which was static, now is allocated
by memalign(), so the malloc pool len should be also increased.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Cc: Michal Simek <monstr@monstr.eu>
Acked-by: Michal Simek <michal.simek@xilinx.com>
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Reduce the boot time of Odroid XU3 by disabling the memset
at malloc init.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
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Reduce the boot time of Odroid X2/U3 by disabling the memset
at malloc init.
This was tested on Odroid X2.
A quick test with checking gpio pin state using the oscilloscope.
Boot time from start to bootcmd (change gpio state by memory write command):
- ~228ms - before this change (arch memset enabled for .bss clear)
- ~100ms - after this change
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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Reduce the boot time of Trats2 by disabling the memset
at malloc init.
This was tested on Trats2.
A quick test with trace. Boot time from start to main_loop() entry:
- ~464ms - before this change (arch memset enabled for .bss clear)
- ~341ms - after this change
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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This commit introduces new config: CONFIG_SYS_MALLOC_CLEAR_ON_INIT.
This config is an expert option and is enabled by default.
The all amount of memory reserved for the malloc, is by default set
to zero in mem_malloc_init(). When the malloc reserved memory exceeds
few MiB, then the boot process can slow down.
So disabling this config, is an expert option to reduce the boot time,
and can be disabled by Kconfig.
Note:
After disable this option, only calloc() will return the pointer
to the zeroed memory area. Previously, without this option,
the memory pointed to untouched malloc memory region, was filled
with zeros. So it means, that code with malloc() calls should
be reexamined.
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
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For writing files, DFU implementation requires the file buffer
with the len at least of file size. For big files it requires
the same big buffer.
Previously the file buffer was allocated as a static variable,
so it was a part of U-Boot .bss section. For 32MiB len of buffer
we have 32MiB of additional space, required for this section.
The .bss needs to be cleared after the relocation.
This introduces an additional boot delay at every start, but usually
the dfu feature is not required at the standard boot, so the buffer
should be allocated only if required.
This patch removes the static allocation of this buffer,
and alloc it with memalign after first call of function:
- dfu_fill_entity_mmc()
and the buffer is freed on dfu_free_entity() call.
This was tested on Trats2.
A quick test with trace. Boot time from start to main_loop() entry:
- ~888ms - before this change (arch memset enabled for .bss clear)
- ~464ms - after this change
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Pantelis Antoniou <panto@antoniou-consulting.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Marek Vasut <marek.vasut@gmail.com>
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For ARM architecture, enable the CONFIG_USE_ARCH_MEMSET/MEMCPY,
will highly increase the memset/memcpy performance. This is able
thanks to the ARM multiple register instructions.
Unfortunatelly the relocation is done without the cache enabled,
so it takes some time, but zeroing the BSS memory takes much more
longer, especially for the configs with big static buffers.
A quick test confirms, that the boot time improvement after using
the arch memcpy for relocation has no significant meaning.
The same test confirms that enable the memset for zeroing BSS,
reduces the boot time.
So this patch enables the arch memset for zeroing the BSS after
the relocation process. For ARM boards, this can be enabled
in board configs by defining: 'CONFIG_USE_ARCH_MEMSET'.
This was tested on Trats2.
A quick test with trace. Boot time from start to main_loop() entry:
- ~1384ms - before this change
- ~888ms - after this change
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Cc: Tom Rini <trini@konsulko.com>
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This commit enables the following configs:
- CONFIG_USE_ARCH_MEMCPY
- CONFIG_USE_ARCH_MEMSET
This increases the performance of memcpy/memset
and also reduces the boot time.
This was tested on Trats2.
A quick test with trace. Boot time from start to main_loop() entry:
- ~1527ms - before this change (arch memset enabled for .bss clear)
- ~1384ms - after this change
Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Cc: Minkyu Kang <mk7.kang@samsung.com>
Cc: Akshay Saraswat <akshay.s@samsung.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
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All the DM-related configuration options are described in Kconfig
helps. They should not be duplicated in README.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
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Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Acked-by: Simon Glass <sjg@chromium.org>
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This strdup() is missing a check. Add it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
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Tweak the output slightly so we don't get things like:
- board1 board2+ board3 board4
There should be a space before the '+'.
Signed-off-by: Simon Glass <sjg@chromium.org>
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Commit d908898 updated the ScanPath() function but not its documentation
and not all its callers.
This breaks the toolchain check after it is downloaded. Fix it.
Signed-off-by: Simon Glass <sjg@chromium.org>
Acked-by: Heiko Schocher <hs@denx.de>
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Enable DM and DM_SPI support for both Cyclone 5 and Arria 5 boards,
since they use drivers which require those.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@opensource.altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
Acked-by: Simon Glass <sjg@chromium.org>
Acked-by: Stefan Roese <sr@denx.de>
Cc: Tom Rini <trini@konsulko.com>
Cc: Vince Bridgers <vbridger@opensource.altera.com>
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Import DTS for Arria V development kit and enable support
for DT. The DT is imported from Linux 3.19-rc1 as of commit
97bf6af1f928216fd6c5a66e8a57bfa95a659672 .
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@opensource.altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Vince Bridgers <vbridger@opensource.altera.com>
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Import DTS for Cyclone V development kit and enable support
for DT. The DT is imported from Linux 3.19-rc1 as of commit
97bf6af1f928216fd6c5a66e8a57bfa95a659672 .
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@opensource.altera.com>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Acked-by: Pavel Machek <pavel@denx.de>
Reviewed-by: Stefan Roese <sr@denx.de>
Cc: Vince Bridgers <vbridger@opensource.altera.com>
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