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-rw-r--r--scripts/Kbuild.include2
-rw-r--r--scripts/Makefile.build22
-rw-r--r--scripts/Makefile.lib14
3 files changed, 28 insertions, 10 deletions
diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include
index 30a5551a4d..6113c13d16 100644
--- a/scripts/Kbuild.include
+++ b/scripts/Kbuild.include
@@ -165,7 +165,7 @@ ar-option = $(call try-run, $(AR) rc$(1) "$$TMP",$(1),$(2))
# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.build obj=
# Usage:
# $(Q)$(MAKE) $(build)=dir
-build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build.tmp obj
+build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj
###
# Shorthand for $(Q)$(MAKE) -f scripts/Makefile.modbuiltin obj=
diff --git a/scripts/Makefile.build b/scripts/Makefile.build
index d5d859c807..2a87984a31 100644
--- a/scripts/Makefile.build
+++ b/scripts/Makefile.build
@@ -2,7 +2,16 @@
# Building
# ==========================================================================
-src := $(obj)
+# Modified for U-Boot
+ifeq ($(CONFIG_TPL_BUILD),y)
+ src := $(patsubst tpl/%,%,$(obj))
+else
+ ifeq ($(CONFIG_SPL_BUILD),y)
+ src := $(patsubst spl/%,%,$(obj))
+ else
+ src := $(obj)
+ endif
+endif
PHONY := __build
__build:
@@ -35,6 +44,11 @@ subdir-ccflags-y :=
include scripts/Kbuild.include
+# Added for U-Boot
+# We must include config.mk after Kbuild.include
+# so that some config.mk can use cc-option.
+include config.mk
+
# For backward compatibility check that these variables do not change
save-cflags := $(CFLAGS)
@@ -115,14 +129,16 @@ ifneq ($(hostprogs-y)$(hostprogs-m),)
include scripts/Makefile.host
endif
-ifneq ($(KBUILD_SRC),)
+# Uncommented for U-Boot
+# We need to create output dicrectory for SPL and TPL even for in-tree build
+#ifneq ($(KBUILD_SRC),)
# Create output directory if not already present
_dummy := $(shell [ -d $(obj) ] || mkdir -p $(obj))
# Create directories for object files if directory does not exist
# Needed when obj-y := dir/file.o syntax is used
_dummy := $(foreach d,$(obj-dirs), $(shell [ -d $(d) ] || mkdir -p $(d)))
-endif
+#endif
ifndef obj
$(warning kbuild: Makefile.build is included improperly)
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib
index 49392ecbef..d4b5cb5d0e 100644
--- a/scripts/Makefile.lib
+++ b/scripts/Makefile.lib
@@ -101,12 +101,13 @@ basename_flags = -D"KBUILD_BASENAME=KBUILD_STR($(call name-fix,$(basetarget)))"
modname_flags = $(if $(filter 1,$(words $(modname))),\
-D"KBUILD_MODNAME=KBUILD_STR($(call name-fix,$(modname)))")
-orig_c_flags = $(KBUILD_CPPFLAGS) $(KBUILD_CFLAGS) $(KBUILD_SUBDIR_CCFLAGS) \
+# U-Boot also uses $(CPPFLAGS)
+orig_c_flags = $(KBUILD_CPPFLAGS) $(CPPFLAGS) $(KBUILD_CFLAGS) $(KBUILD_SUBDIR_CCFLAGS) \
$(ccflags-y) $(CFLAGS_$(basetarget).o)
_c_flags = $(filter-out $(CFLAGS_REMOVE_$(basetarget).o), $(orig_c_flags))
-_a_flags = $(KBUILD_CPPFLAGS) $(KBUILD_AFLAGS) $(KBUILD_SUBDIR_ASFLAGS) \
+_a_flags = $(KBUILD_CPPFLAGS) $(CPPFLAGS) $(KBUILD_AFLAGS) $(KBUILD_SUBDIR_ASFLAGS) \
$(asflags-y) $(AFLAGS_$(basetarget).o)
-_cpp_flags = $(KBUILD_CPPFLAGS) $(cppflags-y) $(CPPFLAGS_$(@F))
+_cpp_flags = $(KBUILD_CPPFLAGS) $(CPPFLAGS) $(cppflags-y) $(CPPFLAGS_$(@F))
#
# Enable gcov profiling flags for a file, directory or for all files depending
@@ -137,14 +138,15 @@ __a_flags = $(call flags,_a_flags)
__cpp_flags = $(call flags,_cpp_flags)
endif
-c_flags = -Wp,-MD,$(depfile) $(NOSTDINC_FLAGS) $(LINUXINCLUDE) \
+# Modified for U-Boot: LINUXINCLUDE -> UBOOTINCLUDE
+c_flags = -Wp,-MD,$(depfile) $(NOSTDINC_FLAGS) $(UBOOTINCLUDE) \
$(__c_flags) $(modkern_cflags) \
-D"KBUILD_STR(s)=\#s" $(basename_flags) $(modname_flags)
-a_flags = -Wp,-MD,$(depfile) $(NOSTDINC_FLAGS) $(LINUXINCLUDE) \
+a_flags = -Wp,-MD,$(depfile) $(NOSTDINC_FLAGS) $(UBOOTINCLUDE) \
$(__a_flags) $(modkern_aflags)
-cpp_flags = -Wp,-MD,$(depfile) $(NOSTDINC_FLAGS) $(LINUXINCLUDE) \
+cpp_flags = -Wp,-MD,$(depfile) $(NOSTDINC_FLAGS) $(UBOOTINCLUDE) \
$(__cpp_flags)
ld_flags = $(LDFLAGS) $(ldflags-y)
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