diff options
Diffstat (limited to 'board/ti/omap5_evm/mux_data.h')
| -rw-r--r-- | board/ti/omap5_evm/mux_data.h | 489 |
1 files changed, 259 insertions, 230 deletions
diff --git a/board/ti/omap5_evm/mux_data.h b/board/ti/omap5_evm/mux_data.h index 18f4729257..296eb682e1 100644 --- a/board/ti/omap5_evm/mux_data.h +++ b/board/ti/omap5_evm/mux_data.h @@ -2,8 +2,7 @@ * (C) Copyright 2010 * Texas Instruments Incorporated, <www.ti.com> * - * Balaji Krishnamoorthy <balajitk@ti.com> - * Aneesh V <aneesh@ti.com> + * Sricharan R <r.sricharan@ti.com> * * See file CREDITS for list of people who contributed to this * project. @@ -30,246 +29,276 @@ const struct pad_conf_entry core_padconf_array_essential[] = { -{GPMC_AD0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat0 */ -{GPMC_AD1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat1 */ -{GPMC_AD2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat2 */ -{GPMC_AD3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat3 */ -{GPMC_AD4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat4 */ -{GPMC_AD5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat5 */ -{GPMC_AD6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat6 */ -{GPMC_AD7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_dat7 */ -{GPMC_NOE, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M1)}, /* sdmmc2_clk */ -{GPMC_NWE, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* sdmmc2_cmd */ -{SDMMC1_CLK, (PTU | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc1_clk */ -{SDMMC1_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_cmd */ -{SDMMC1_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat0 */ -{SDMMC1_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat1 */ -{SDMMC1_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat2 */ -{SDMMC1_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat3 */ -{SDMMC1_DAT4, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat4 */ -{SDMMC1_DAT5, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat5 */ -{SDMMC1_DAT6, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat6 */ -{SDMMC1_DAT7, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc1_dat7 */ -{UART3_CTS_RCTX, (PTU | IEN | M0)}, /* uart3_tx */ -{UART3_RTS_SD, (M0)}, /* uart3_rts_sd */ -{UART3_RX_IRRX, (IEN | M0)}, /* uart3_rx */ -{UART3_TX_IRTX, (M0)} /* uart3_tx */ + {EMMC_CLK, (PTU | IEN | M0)}, /* EMMC_CLK */ + {EMMC_CMD, (PTU | IEN | M0)}, /* EMMC_CMD */ + {EMMC_DATA0, (PTU | IEN | M0)}, /* EMMC_DATA0 */ + {EMMC_DATA1, (PTU | IEN | M0)}, /* EMMC_DATA1 */ + {EMMC_DATA2, (PTU | IEN | M0)}, /* EMMC_DATA2 */ + {EMMC_DATA3, (PTU | IEN | M0)}, /* EMMC_DATA3 */ + {EMMC_DATA4, (PTU | IEN | M0)}, /* EMMC_DATA4 */ + {EMMC_DATA5, (PTU | IEN | M0)}, /* EMMC_DATA5 */ + {EMMC_DATA6, (PTU | IEN | M0)}, /* EMMC_DATA6 */ + {EMMC_DATA7, (PTU | IEN | M0)}, /* EMMC_DATA7 */ + {SDCARD_CLK, (PTU | IEN | M0)}, /* SDCARD_CLK */ + {SDCARD_CMD, (PTU | IEN | M0)}, /* SDCARD_CMD */ + {SDCARD_DATA0, (PTU | IEN | M0)}, /* SDCARD_DATA0*/ + {SDCARD_DATA1, (PTU | IEN | M0)}, /* SDCARD_DATA1*/ + {SDCARD_DATA2, (PTU | IEN | M0)}, /* SDCARD_DATA2*/ + {SDCARD_DATA3, (PTU | IEN | M0)}, /* SDCARD_DATA3*/ + {UART3_RX_IRRX, (PTU | IEN | M0)}, /* UART3_RX_IRRX */ + {UART3_TX_IRTX, (M0)}, /* UART3_TX_IRTX */ }; const struct pad_conf_entry wkup_padconf_array_essential[] = { -{PAD1_SR_SCL, (PTU | IEN | M0)}, /* sr_scl */ -{PAD0_SR_SDA, (PTU | IEN | M0)}, /* sr_sda */ -{PAD1_SYS_32K, (IEN | M0)} /* sys_32k */ + {SR_PMIC_SCL, (PTU | IEN | M0)}, /* SR_PMIC_SCL */ + {SR_PMIC_SDA, (PTU | IEN | M0)}, /* SR_PMIC_SDA */ + {SYS_32K, (IEN | M0)}, /* SYS_32K */ }; const struct pad_conf_entry core_padconf_array_non_essential[] = { - {GPMC_AD8, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M3)}, /* gpio_32 */ - {GPMC_AD9, (PTU | IEN | M3)}, /* gpio_33 */ - {GPMC_AD10, (PTU | IEN | M3)}, /* gpio_34 */ - {GPMC_AD11, (PTU | IEN | M3)}, /* gpio_35 */ - {GPMC_AD12, (PTU | IEN | M3)}, /* gpio_36 */ - {GPMC_AD13, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_37 */ - {GPMC_AD14, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_38 */ - {GPMC_AD15, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_39 */ - {GPMC_A16, (M3)}, /* gpio_40 */ - {GPMC_A17, (PTD | M3)}, /* gpio_41 */ - {GPMC_A18, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row6 */ - {GPMC_A19, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row7 */ - {GPMC_A20, (IEN | M3)}, /* gpio_44 */ - {GPMC_A21, (M3)}, /* gpio_45 */ - {GPMC_A22, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col6 */ - {GPMC_A23, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col7 */ - {GPMC_A24, (PTD | M3)}, /* gpio_48 */ - {GPMC_A25, (PTD | M3)}, /* gpio_49 */ - {GPMC_NCS0, (M3)}, /* gpio_50 */ - {GPMC_NCS1, (IEN | M3)}, /* gpio_51 */ - {GPMC_NCS2, (IEN | M3)}, /* gpio_52 */ - {GPMC_NCS3, (IEN | M3)}, /* gpio_53 */ - {GPMC_NWP, (M3)}, /* gpio_54 */ - {GPMC_CLK, (PTD | M3)}, /* gpio_55 */ - {GPMC_NADV_ALE, (M3)}, /* gpio_56 */ - {GPMC_NBE0_CLE, (M3)}, /* gpio_59 */ - {GPMC_NBE1, (PTD | M3)}, /* gpio_60 */ - {GPMC_WAIT0, (PTU | IEN | M3)}, /* gpio_61 */ - {GPMC_WAIT1, (IEN | M3)}, /* gpio_62 */ - {C2C_DATA11, (PTD | M3)}, /* gpio_100 */ - {C2C_DATA12, (M1)}, /* dsi1_te0 */ - {C2C_DATA13, (PTD | M3)}, /* gpio_102 */ - {C2C_DATA14, (M1)}, /* dsi2_te0 */ - {C2C_DATA15, (PTD | M3)}, /* gpio_104 */ - {HDMI_HPD, (M0)}, /* hdmi_hpd */ - {HDMI_CEC, (M0)}, /* hdmi_cec */ - {HDMI_DDC_SCL, (PTU | M0)}, /* hdmi_ddc_scl */ - {HDMI_DDC_SDA, (PTU | IEN | M0)}, /* hdmi_ddc_sda */ - {CSI21_DX0, (IEN | M0)}, /* csi21_dx0 */ - {CSI21_DY0, (IEN | M0)}, /* csi21_dy0 */ - {CSI21_DX1, (IEN | M0)}, /* csi21_dx1 */ - {CSI21_DY1, (IEN | M0)}, /* csi21_dy1 */ - {CSI21_DX2, (IEN | M0)}, /* csi21_dx2 */ - {CSI21_DY2, (IEN | M0)}, /* csi21_dy2 */ - {CSI21_DX3, (PTD | M7)}, /* csi21_dx3 */ - {CSI21_DY3, (PTD | M7)}, /* csi21_dy3 */ - {CSI21_DX4, (PTD | OFF_EN | OFF_PD | OFF_IN | M7)}, /* csi21_dx4 */ - {CSI21_DY4, (PTD | OFF_EN | OFF_PD | OFF_IN | M7)}, /* csi21_dy4 */ - {CSI22_DX0, (IEN | M0)}, /* csi22_dx0 */ - {CSI22_DY0, (IEN | M0)}, /* csi22_dy0 */ - {CSI22_DX1, (IEN | M0)}, /* csi22_dx1 */ - {CSI22_DY1, (IEN | M0)}, /* csi22_dy1 */ - {CAM_SHUTTER, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* cam_shutter */ - {CAM_STROBE, (OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* cam_strobe */ - {CAM_GLOBALRESET, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M3)}, /* gpio_83 */ - {USBB1_ULPITLL_CLK, (IEN | OFF_EN | OFF_IN | M1)}, /* hsi1_cawake */ - {USBB1_ULPITLL_STP, (IEN | OFF_EN | OFF_IN | M1)}, /* hsi1_cadata */ - {USBB1_ULPITLL_DIR, (IEN | OFF_EN | OFF_IN | M1)}, /* hsi1_caflag */ - {USBB1_ULPITLL_NXT, (OFF_EN | M1)}, /* hsi1_acready */ - {USBB1_ULPITLL_DAT0, (OFF_EN | M1)}, /* hsi1_acwake */ - {USBB1_ULPITLL_DAT1, (OFF_EN | M1)}, /* hsi1_acdata */ - {USBB1_ULPITLL_DAT2, (OFF_EN | M1)}, /* hsi1_acflag */ - {USBB1_ULPITLL_DAT3, (IEN | OFF_EN | OFF_IN | M1)}, /* hsi1_caready */ - {USBB1_ULPITLL_DAT4, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat4 */ - {USBB1_ULPITLL_DAT5, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat5 */ - {USBB1_ULPITLL_DAT6, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat6 */ - {USBB1_ULPITLL_DAT7, (IEN | OFF_EN | OFF_PD | OFF_IN | M4)}, /* usbb1_ulpiphy_dat7 */ - {USBB1_HSIC_DATA, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_data */ - {USBB1_HSIC_STROBE, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usbb1_hsic_strobe */ - {USBC1_ICUSB_DP, (IEN | M0)}, /* usbc1_icusb_dp */ - {USBC1_ICUSB_DM, (IEN | M0)}, /* usbc1_icusb_dm */ - {ABE_MCBSP2_CLKX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp2_clkx */ - {ABE_MCBSP2_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp2_dr */ - {ABE_MCBSP2_DX, (OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp2_dx */ - {ABE_MCBSP2_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp2_fsx */ - {ABE_MCBSP1_CLKX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp1_clkx */ - {ABE_MCBSP1_DR, (IEN | OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp1_dr */ - {ABE_MCBSP1_DX, (OFF_EN | OFF_OUT_PTD | M0)}, /* abe_mcbsp1_dx */ - {ABE_MCBSP1_FSX, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_mcbsp1_fsx */ - {ABE_PDM_UL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_ul_data */ - {ABE_PDM_DL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_dl_data */ - {ABE_PDM_FRAME, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_frame */ - {ABE_PDM_LB_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_pdm_lb_clk */ - {ABE_CLKS, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* abe_clks */ - {ABE_DMIC_CLK1, (M0)}, /* abe_dmic_clk1 */ - {ABE_DMIC_DIN1, (IEN | M0)}, /* abe_dmic_din1 */ - {ABE_DMIC_DIN2, (IEN | M0)}, /* abe_dmic_din2 */ - {ABE_DMIC_DIN3, (IEN | M0)}, /* abe_dmic_din3 */ - {UART2_CTS, (PTU | IEN | M0)}, /* uart2_cts */ - {UART2_RTS, (M0)}, /* uart2_rts */ - {UART2_RX, (PTU | IEN | M0)}, /* uart2_rx */ - {UART2_TX, (M0)}, /* uart2_tx */ - {HDQ_SIO, (M3)}, /* gpio_127 */ - {MCSPI1_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_clk */ - {MCSPI1_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_somi */ - {MCSPI1_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_simo */ - {MCSPI1_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi1_cs0 */ - {MCSPI1_CS1, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M3)}, /* mcspi1_cs1 */ - {MCSPI1_CS2, (PTU | OFF_EN | OFF_OUT_PTU | M3)}, /* gpio_139 */ - {MCSPI1_CS3, (PTU | IEN | M3)}, /* gpio_140 */ - {SDMMC5_CLK, (PTU | IEN | OFF_EN | OFF_OUT_PTD | M0)}, /* sdmmc5_clk */ - {SDMMC5_CMD, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_cmd */ - {SDMMC5_DAT0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat0 */ - {SDMMC5_DAT1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat1 */ - {SDMMC5_DAT2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat2 */ - {SDMMC5_DAT3, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* sdmmc5_dat3 */ - {MCSPI4_CLK, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_clk */ - {MCSPI4_SIMO, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_simo */ - {MCSPI4_SOMI, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_somi */ - {MCSPI4_CS0, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* mcspi4_cs0 */ - {UART4_RX, (IEN | M0)}, /* uart4_rx */ - {UART4_TX, (M0)}, /* uart4_tx */ - {USBB2_ULPITLL_CLK, (PTD | IEN | M3)}, /* gpio_157 */ - {USBB2_ULPITLL_STP, (IEN | M5)}, /* dispc2_data23 */ - {USBB2_ULPITLL_DIR, (IEN | M5)}, /* dispc2_data22 */ - {USBB2_ULPITLL_NXT, (IEN | M5)}, /* dispc2_data21 */ - {USBB2_ULPITLL_DAT0, (IEN | M5)}, /* dispc2_data20 */ - {USBB2_ULPITLL_DAT1, (IEN | M5)}, /* dispc2_data19 */ - {USBB2_ULPITLL_DAT2, (IEN | M5)}, /* dispc2_data18 */ - {USBB2_ULPITLL_DAT3, (IEN | M5)}, /* dispc2_data15 */ - {USBB2_ULPITLL_DAT4, (IEN | M5)}, /* dispc2_data14 */ - {USBB2_ULPITLL_DAT5, (IEN | M5)}, /* dispc2_data13 */ - {USBB2_ULPITLL_DAT6, (IEN | M5)}, /* dispc2_data12 */ - {USBB2_ULPITLL_DAT7, (IEN | M5)}, /* dispc2_data11 */ - {USBB2_HSIC_DATA, (PTD | OFF_EN | OFF_OUT_PTU | M3)}, /* gpio_169 */ - {USBB2_HSIC_STROBE, (PTD | OFF_EN | OFF_OUT_PTU | M3)}, /* gpio_170 */ - {UNIPRO_TX0, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col0 */ - {UNIPRO_TY0, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col1 */ - {UNIPRO_TX1, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col2 */ - {UNIPRO_TY1, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col3 */ - {UNIPRO_TX2, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col4 */ - {UNIPRO_TY2, (OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_col5 */ - {UNIPRO_RX0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row0 */ - {UNIPRO_RY0, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row1 */ - {UNIPRO_RX1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row2 */ - {UNIPRO_RY1, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row3 */ - {UNIPRO_RX2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row4 */ - {UNIPRO_RY2, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M1)}, /* kpd_row5 */ - {USBA0_OTG_CE, (PTD | OFF_EN | OFF_PD | OFF_OUT_PTD | M0)}, /* usba0_otg_ce */ - {USBA0_OTG_DP, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dp */ - {USBA0_OTG_DM, (IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* usba0_otg_dm */ - {FREF_CLK1_OUT, (M0)}, /* fref_clk1_out */ - {FREF_CLK2_OUT, (M0)}, /* fref_clk2_out */ - {SYS_NIRQ1, (PTU | IEN | M0)}, /* sys_nirq1 */ - {SYS_NIRQ2, (M7)}, /* sys_nirq2 */ - {SYS_BOOT0, (PTU | IEN | M3)}, /* gpio_184 */ - {SYS_BOOT1, (M3)}, /* gpio_185 */ - {SYS_BOOT2, (PTD | IEN | M3)}, /* gpio_186 */ - {SYS_BOOT3, (PTD | IEN | M3)}, /* gpio_187 */ - {SYS_BOOT4, (M3)}, /* gpio_188 */ - {SYS_BOOT5, (PTD | IEN | M3)}, /* gpio_189 */ - {DPM_EMU0, (IEN | M0)}, /* dpm_emu0 */ - {DPM_EMU1, (IEN | M0)}, /* dpm_emu1 */ - {DPM_EMU2, (IEN | M0)}, /* dpm_emu2 */ - {DPM_EMU3, (IEN | M5)}, /* dispc2_data10 */ - {DPM_EMU4, (IEN | M5)}, /* dispc2_data9 */ - {DPM_EMU5, (IEN | M5)}, /* dispc2_data16 */ - {DPM_EMU6, (IEN | M5)}, /* dispc2_data17 */ - {DPM_EMU7, (IEN | M5)}, /* dispc2_hsync */ - {DPM_EMU8, (IEN | M5)}, /* dispc2_pclk */ - {DPM_EMU9, (IEN | M5)}, /* dispc2_vsync */ - {DPM_EMU10, (IEN | M5)}, /* dispc2_de */ - {DPM_EMU11, (IEN | M5)}, /* dispc2_data8 */ - {DPM_EMU12, (IEN | M5)}, /* dispc2_data7 */ - {DPM_EMU13, (IEN | M5)}, /* dispc2_data6 */ - {DPM_EMU14, (IEN | M5)}, /* dispc2_data5 */ - {DPM_EMU15, (IEN | M5)}, /* dispc2_data4 */ - {DPM_EMU16, (M3)}, /* gpio_27 */ - {DPM_EMU17, (IEN | M5)}, /* dispc2_data2 */ - {DPM_EMU18, (IEN | M5)}, /* dispc2_data1 */ - {DPM_EMU19, (IEN | M5)}, /* dispc2_data0 */ - {I2C1_SCL, (PTU | IEN | M0)}, /* i2c1_scl */ - {I2C1_SDA, (PTU | IEN | M0)}, /* i2c1_sda */ - {I2C2_SCL, (PTU | IEN | M0)}, /* i2c2_scl */ - {I2C2_SDA, (PTU | IEN | M0)}, /* i2c2_sda */ - {I2C3_SCL, (PTU | IEN | M0)}, /* i2c3_scl */ - {I2C3_SDA, (PTU | IEN | M0)}, /* i2c3_sda */ - {I2C4_SCL, (PTU | IEN | M0)}, /* i2c4_scl */ - {I2C4_SDA, (PTU | IEN | M0)} /* i2c4_sda */ + + {C2C_DATAIN0, (IEN | M0)}, /* C2C_DATAIN0 */ + {C2C_DATAIN1, (IEN | M0)}, /* C2C_DATAIN1 */ + {C2C_DATAIN2, (IEN | M0)}, /* C2C_DATAIN2 */ + {C2C_DATAIN3, (IEN | M0)}, /* C2C_DATAIN3 */ + {C2C_DATAIN4, (IEN | M0)}, /* C2C_DATAIN4 */ + {C2C_DATAIN5, (IEN | M0)}, /* C2C_DATAIN5 */ + {C2C_DATAIN6, (IEN | M0)}, /* C2C_DATAIN6 */ + {C2C_DATAIN7, (IEN | M0)}, /* C2C_DATAIN7 */ + {C2C_CLKIN1, (IEN | M0)}, /* C2C_CLKIN1 */ + {C2C_CLKIN0, (IEN | M0)}, /* C2C_CLKIN0 */ + {C2C_CLKOUT0, (M0)}, /* C2C_CLKOUT0 */ + {C2C_CLKOUT1, (M0)}, /* C2C_CLKOUT1 */ + {C2C_DATAOUT0, (M0)}, /* C2C_DATAOUT0 */ + {C2C_DATAOUT1, (M0)}, /* C2C_DATAOUT1 */ + {C2C_DATAOUT2, (M0)}, /* C2C_DATAOUT2 */ + {C2C_DATAOUT3, (M0)}, /* C2C_DATAOUT3 */ + {C2C_DATAOUT4, (M0)}, /* C2C_DATAOUT4 */ + {C2C_DATAOUT5, (M0)}, /* C2C_DATAOUT5 */ + {C2C_DATAOUT6, (M0)}, /* C2C_DATAOUT6 */ + {C2C_DATAOUT7, (M0)}, /* C2C_DATAOUT7 */ + {C2C_DATA8, (IEN | M0)}, /* C2C_DATA8 */ + {C2C_DATA9, (IEN | M0)}, /* C2C_DATA9 */ + {C2C_DATA10, (IEN | M0)}, /* C2C_DATA10 */ + {C2C_DATA11, (IEN | M0)}, /* C2C_DATA11 */ + {C2C_DATA12, (IEN | M0)}, /* C2C_DATA12 */ + {C2C_DATA13, (IEN | M0)}, /* C2C_DATA13 */ + {C2C_DATA14, (IEN | M0)}, /* C2C_DATA14 */ + {C2C_DATA15, (IEN | M0)}, /* C2C_DATA15 */ + {LLIB_WAKEREQOUT, (PTU | IEN | M6)}, /* GPIO2_32 */ + {LLIA_WAKEREQOUT, (M1)}, /* C2C_WAKEREQOUT */ + {HSI1_ACREADY, (PTD | M6)}, /* GPIO3_64 */ + {HSI1_CAREADY, (PTD | M6)}, /* GPIO3_65 */ + {HSI1_ACWAKE, (PTD | IEN | M6)}, /* GPIO3_66 */ + {HSI1_CAWAKE, (PTU | IEN | M6)}, /* GPIO3_67 */ + {HSI1_ACFLAG, (PTD | IEN | M6)}, /* GPIO3_68 */ + {HSI1_ACDATA, (PTD | M6)}, /* GPIO3_69 */ + {HSI1_CAFLAG, (M6)}, /* GPIO3_70 */ + {HSI1_CADATA, (M6)}, /* GPIO3_71 */ + {UART1_TX, (M0)}, /* UART1_TX */ + {UART1_CTS, (PTU | IEN | M0)}, /* UART1_CTS */ + {UART1_RX, (PTU | IEN | M0)}, /* UART1_RX */ + {UART1_RTS, (M0)}, /* UART1_RTS */ + {HSI2_CAREADY, (IEN | M0)}, /* HSI2_CAREADY */ + {HSI2_ACREADY, (OFF_EN | M0)}, /* HSI2_ACREADY */ + {HSI2_CAWAKE, (IEN | PTD | M0)}, /* HSI2_CAWAKE */ + {HSI2_ACWAKE, (M0)}, /* HSI2_ACWAKE */ + {HSI2_CAFLAG, (IEN | PTD | M0)}, /* HSI2_CAFLAG */ + {HSI2_CADATA, (IEN | PTD | M0)}, /* HSI2_CADATA */ + {HSI2_ACFLAG, (M0)}, /* HSI2_ACFLAG */ + {HSI2_ACDATA, (M0)}, /* HSI2_ACDATA */ + {UART2_RTS, (IEN | M1)}, /* MCSPI3_SOMI */ + {UART2_CTS, (IEN | M1)}, /* MCSPI3_CS0 */ + {UART2_RX, (IEN | M1)}, /* MCSPI3_SIMO */ + {UART2_TX, (IEN | M1)}, /* MCSPI3_CLK */ + {USBB1_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB1_HSIC_STROBE */ + {USBB1_HSIC_DATA, (PTU | IEN | M0)}, /* USBB1_HSIC_DATA */ + {USBB2_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB2_HSIC_STROBE */ + {USBB2_HSIC_DATA, (PTU | IEN | M0)}, /* USBB2_HSIC_DATA */ + {TIMER10_PWM_EVT, (IEN | M0)}, /* TIMER10_PWM_EVT */ + {DSIPORTA_TE0, (IEN | M0)}, /* DSIPORTA_TE0 */ + {DSIPORTA_LANE0X, (IEN | M0)}, /* DSIPORTA_LANE0X */ + {DSIPORTA_LANE0Y, (IEN | M0)}, /* DSIPORTA_LANE0Y */ + {DSIPORTA_LANE1X, (IEN | M0)}, /* DSIPORTA_LANE1X */ + {DSIPORTA_LANE1Y, (IEN | M0)}, /* DSIPORTA_LANE1Y */ + {DSIPORTA_LANE2X, (IEN | M0)}, /* DSIPORTA_LANE2X */ + {DSIPORTA_LANE2Y, (IEN | M0)}, /* DSIPORTA_LANE2Y */ + {DSIPORTA_LANE3X, (IEN | M0)}, /* DSIPORTA_LANE3X */ + {DSIPORTA_LANE3Y, (IEN | M0)}, /* DSIPORTA_LANE3Y */ + {DSIPORTA_LANE4X, (IEN | M0)}, /* DSIPORTA_LANE4X */ + {DSIPORTA_LANE4Y, (IEN | M0)}, /* DSIPORTA_LANE4Y */ + {TIMER9_PWM_EVT, (IEN | M0)}, /* TIMER9_PWM_EVT */ + {DSIPORTC_TE0, (IEN | M0)}, /* DSIPORTC_TE0 */ + {DSIPORTC_LANE0X, (IEN | M0)}, /* DSIPORTC_LANE0X */ + {DSIPORTC_LANE0Y, (IEN | M0)}, /* DSIPORTC_LANE0Y */ + {DSIPORTC_LANE1X, (IEN | M0)}, /* DSIPORTC_LANE1X */ + {DSIPORTC_LANE1Y, (IEN | M0)}, /* DSIPORTC_LANE1Y */ + {DSIPORTC_LANE2X, (IEN | M0)}, /* DSIPORTC_LANE2X */ + {DSIPORTC_LANE2Y, (IEN | M0)}, /* DSIPORTC_LANE2Y */ + {DSIPORTC_LANE3X, (IEN | M0)}, /* DSIPORTC_LANE3X */ + {DSIPORTC_LANE3Y, (IEN | M0)}, /* DSIPORTC_LANE3Y */ + {DSIPORTC_LANE4X, (IEN | M0)}, /* DSIPORTC_LANE4X */ + {DSIPORTC_LANE4Y, (IEN | M0)}, /* DSIPORTC_LANE4Y */ + {RFBI_HSYNC0, (M4)}, /* KBD_COL5 */ + {RFBI_TE_VSYNC0, (PTD | M6)}, /* GPIO6_161 */ + {RFBI_RE, (M4)}, /* KBD_COL4 */ + {RFBI_A0, (PTD | IEN | M6)}, /* GPIO6_165 */ + {RFBI_DATA8, (M4)}, /* KBD_COL3 */ + {RFBI_DATA9, (PTD | M6)}, /* GPIO6_175 */ + {RFBI_DATA10, (PTD | M6)}, /* GPIO6_176 */ + {RFBI_DATA11, (PTD | M6)}, /* GPIO6_177 */ + {RFBI_DATA12, (PTD | M6)}, /* GPIO6_178 */ + {RFBI_DATA13, (PTU | IEN | M6)}, /* GPIO6_179 */ + {RFBI_DATA14, (M4)}, /* KBD_COL7 */ + {RFBI_DATA15, (M4)}, /* KBD_COL6 */ + {GPIO6_182, (M6)}, /* GPIO6_182 */ + {GPIO6_183, (PTD | M6)}, /* GPIO6_183 */ + {GPIO6_184, (M4)}, /* KBD_COL2 */ + {GPIO6_185, (PTD | IEN | M6)}, /* GPIO6_185 */ + {GPIO6_186, (PTD | M6)}, /* GPIO6_186 */ + {GPIO6_187, (PTU | IEN | M4)}, /* KBD_ROW2 */ + {RFBI_DATA0, (PTD | M6)}, /* GPIO6_166 */ + {RFBI_DATA1, (PTD | M6)}, /* GPIO6_167 */ + {RFBI_DATA2, (PTD | M6)}, /* GPIO6_168 */ + {RFBI_DATA3, (PTD | IEN | M6)}, /* GPIO6_169 */ + {RFBI_DATA4, (IEN | M6)}, /* GPIO6_170 */ + {RFBI_DATA5, (IEN | M6)}, /* GPIO6_171 */ + {RFBI_DATA6, (PTD | M6)}, /* GPIO6_172 */ + {RFBI_DATA7, (PTD | M6)}, /* GPIO6_173 */ + {RFBI_CS0, (PTD | IEN | M6)}, /* GPIO6_163 */ + {RFBI_WE, (PTD | M6)}, /* GPIO6_162 */ + {MCSPI2_CS0, (M0)}, /* MCSPI2_CS0 */ + {MCSPI2_CLK, (IEN | M0)}, /* MCSPI2_CLK */ + {MCSPI2_SIMO, (IEN | M0)}, /* MCSPI2_SIMO*/ + {MCSPI2_SOMI, (PTU | IEN | M0)}, /* MCSPI2_SOMI*/ + {I2C4_SCL, (IEN | M0)}, /* I2C4_SCL */ + {I2C4_SDA, (IEN | M0)}, /* I2C4_SDA */ + {HDMI_CEC, (IEN | M0)}, /* HDMI_CEC */ + {HDMI_HPD, (PTD | IEN | M0)}, /* HDMI_HPD */ + {HDMI_DDC_SCL, (IEN | M0)}, /* HDMI_DDC_SCL */ + {HDMI_DDC_SDA, (IEN | M0)}, /* HDMI_DDC_SDA */ + {CSIPORTA_LANE0X, (IEN | M0)}, /* CSIPORTA_LANE0X */ + {CSIPORTA_LANE0Y, (IEN | M0)}, /* CSIPORTA_LANE0Y */ + {CSIPORTA_LANE1Y, (IEN | M0)}, /* CSIPORTA_LANE1Y */ + {CSIPORTA_LANE1X, (IEN | M0)}, /* CSIPORTA_LANE1X */ + {CSIPORTA_LANE2Y, (IEN | M0)}, /* CSIPORTA_LANE2Y */ + {CSIPORTA_LANE2X, (IEN | M0)}, /* CSIPORTA_LANE2X */ + {CSIPORTA_LANE3X, (IEN | M0)}, /* CSIPORTA_LANE3X */ + {CSIPORTA_LANE3Y, (IEN | M0)}, /* CSIPORTA_LANE3Y */ + {CSIPORTA_LANE4X, (IEN | M0)}, /* CSIPORTA_LANE4X */ + {CSIPORTA_LANE4Y, (IEN | M0)}, /* CSIPORTA_LANE4Y */ + {CSIPORTB_LANE0X, (IEN | M0)}, /* CSIPORTB_LANE0X */ + {CSIPORTB_LANE0Y, (IEN | M0)}, /* CSIPORTB_LANE0Y */ + {CSIPORTB_LANE1Y, (IEN | M0)}, /* CSIPORTB_LANE1Y */ + {CSIPORTB_LANE1X, (IEN | M0)}, /* CSIPORTB_LANE1X */ + {CSIPORTB_LANE2Y, (IEN | M0)}, /* CSIPORTB_LANE2Y */ + {CSIPORTB_LANE2X, (IEN | M0)}, /* CSIPORTB_LANE2X */ + {CSIPORTC_LANE0Y, (IEN | M0)}, /* CSIPORTC_LANE0Y */ + {CSIPORTC_LANE0X, (IEN | M0)}, /* CSIPORTC_LANE0X */ + {CSIPORTC_LANE1Y, (IEN | M0)}, /* CSIPORTC_LANE1Y */ + {CSIPORTC_LANE1X, (IEN | M0)}, /* CSIPORTC_LANE1X */ + {CAM_SHUTTER, (M0)}, /* CAM_SHUTTER */ + {CAM_STROBE, (M0)}, /* CAM_STROBE */ + {CAM_GLOBALRESET, (IEN | M0)}, /* CAM_GLOBALRESET */ + {TIMER11_PWM_EVT, (PTD | M6)}, /* GPIO8_227 */ + {TIMER5_PWM_EVT, (PTD | M6)}, /* GPIO8_228 */ + {TIMER6_PWM_EVT, (PTD | M6)}, /* GPIO8_229 */ + {TIMER8_PWM_EVT, (PTU | M6)}, /* GPIO8_230 */ + {I2C3_SCL, (IEN | M0)}, /* I2C3_SCL */ + {I2C3_SDA, (IEN | M0)}, /* I2C3_SDA */ + {GPIO8_233, (IEN | M2)}, /* TIMER8_PWM_EVT */ + {ABE_CLKS, (IEN | M0)}, /* ABE_CLKS */ + {ABEDMIC_DIN1, (IEN | M0)}, /* ABEDMIC_DIN1 */ + {ABEDMIC_DIN2, (IEN | M0)}, /* ABEDMIC_DIN2 */ + {ABEDMIC_DIN3, (IEN | M0)}, /* ABEDMIC_DIN3 */ + {ABEDMIC_CLK1, (M0)}, /* ABEDMIC_CLK1 */ + {ABEDMIC_CLK2, (IEN | M1)}, /* ABEMCBSP1_FSX */ + {ABEDMIC_CLK3, (M1)}, /* ABEMCBSP1_DX */ + {ABESLIMBUS1_CLOCK, (IEN | M1)}, /* ABEMCBSP1_CLKX */ + {ABESLIMBUS1_DATA, (IEN | M1)}, /* ABEMCBSP1_DR */ + {ABEMCBSP2_DR, (IEN | M0)}, /* ABEMCBSP2_DR */ + {ABEMCBSP2_DX, (M0)}, /* ABEMCBSP2_DX */ + {ABEMCBSP2_FSX, (IEN | M0)}, /* ABEMCBSP2_FSX */ + {ABEMCBSP2_CLKX, (IEN | M0)}, /* ABEMCBSP2_CLKX */ + {ABEMCPDM_UL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* ABEMCPDM_UL_DATA */ + {ABEMCPDM_DL_DATA, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* ABEMCPDM_DL_DATA */ + {ABEMCPDM_FRAME, (PTU | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* ABEMCPDM_FRAME */ + {ABEMCPDM_LB_CLK, (PTD | IEN | OFF_EN | OFF_PD | OFF_IN | M0)}, /* ABEMCPDM_LB_CLK */ + {WLSDIO_CLK, (PTU | IEN | M0)}, /* WLSDIO_CLK */ + {WLSDIO_CMD, (PTU | IEN | M0)}, /* WLSDIO_CMD */ + {WLSDIO_DATA0, (PTU | IEN | M0)}, /* WLSDIO_DATA0*/ + {WLSDIO_DATA1, (PTU | IEN | M0)}, /* WLSDIO_DATA1*/ + {WLSDIO_DATA2, (PTU | IEN | M0)}, /* WLSDIO_DATA2*/ + {WLSDIO_DATA3, (PTU | IEN | M0)}, /* WLSDIO_DATA3*/ + {UART5_RX, (PTU | IEN | M0)}, /* UART5_RX */ + {UART5_TX, (M0)}, /* UART5_TX */ + {UART5_CTS, (PTU | IEN | M0)}, /* UART5_CTS */ + {UART5_RTS, (M0)}, /* UART5_RTS */ + {I2C2_SCL, (IEN | M0)}, /* I2C2_SCL */ + {I2C2_SDA, (IEN | M0)}, /* I2C2_SDA */ + {MCSPI1_CLK, (M6)}, /* GPIO5_140 */ + {MCSPI1_SOMI, (IEN | M6)}, /* GPIO5_141 */ + {MCSPI1_SIMO, (PTD | M6)}, /* GPIO5_142 */ + {MCSPI1_CS0, (PTD | M6)}, /* GPIO5_143 */ + {MCSPI1_CS1, (PTD | IEN | M6)}, /* GPIO5_144 */ + {I2C5_SCL, (IEN | M0)}, /* I2C5_SCL */ + {I2C5_SDA, (IEN | M0)}, /* I2C5_SDA */ + {PERSLIMBUS2_CLOCK, (PTD | M6)}, /* GPIO5_145 */ + {PERSLIMBUS2_DATA, (PTD | IEN | M6)}, /* GPIO5_146 */ + {UART6_TX, (PTU | IEN | M6)}, /* GPIO5_149 */ + {UART6_RX, (PTU | IEN | M6)}, /* GPIO5_150 */ + {UART6_CTS, (PTU | IEN | M6)}, /* GPIO5_151 */ + {UART6_RTS, (PTU | M0)}, /* UART6_RTS */ + {UART3_CTS_RCTX, (PTU | IEN | M6)}, /* GPIO5_153 */ + {UART3_RTS_IRSD, (PTU | IEN | M1)}, /* HDQ_SIO */ + {USBB3_HSIC_STROBE, (PTU | IEN | M0)}, /* USBB3_HSIC_STROBE*/ + {USBB3_HSIC_DATA, (PTU | IEN | M0)}, /* USBB3_HSIC_DATA */ + {USBD0_HS_DP, (IEN | M0)}, /* USBD0_HS_DP */ + {USBD0_HS_DM, (IEN | M0)}, /* USBD0_HS_DM */ + {USBD0_SS_RX, (IEN | M0)}, /* USBD0_SS_RX */ + {I2C1_PMIC_SCL, (PTU | IEN | M0)}, /* I2C1_PMIC_SCL */ + {I2C1_PMIC_SDA, (PTU | IEN | M0)}, /* I2C1_PMIC_SDA */ + }; const struct pad_conf_entry wkup_padconf_array_non_essential[] = { - {PAD0_SIM_IO, (IEN | M0)}, /* sim_io */ - {PAD1_SIM_CLK, (M0)}, /* sim_clk */ - {PAD0_SIM_RESET, (M0)}, /* sim_reset */ - {PAD1_SIM_CD, (PTU | IEN | M0)}, /* sim_cd */ - {PAD0_SIM_PWRCTRL, (M0)}, /* sim_pwrctrl */ - {PAD1_FREF_XTAL_IN, (M0)}, /* # */ - {PAD0_FREF_SLICER_IN, (M0)}, /* fref_slicer_in */ - {PAD1_FREF_CLK_IOREQ, (M0)}, /* fref_clk_ioreq */ - {PAD0_FREF_CLK0_OUT, (M2)}, /* sys_drm_msecure */ - {PAD1_FREF_CLK3_REQ, (PTU | IEN | M0)}, /* # */ - {PAD0_FREF_CLK3_OUT, (M0)}, /* fref_clk3_out */ - {PAD1_FREF_CLK4_REQ, (PTU | IEN | M0)}, /* # */ - {PAD0_FREF_CLK4_OUT, (M0)}, /* # */ - {PAD0_SYS_NRESPWRON, (M0)}, /* sys_nrespwron */ - {PAD1_SYS_NRESWARM, (M0)}, /* sys_nreswarm */ - {PAD0_SYS_PWR_REQ, (PTU | M0)}, /* sys_pwr_req */ - {PAD1_SYS_PWRON_RESET, (M3)}, /* gpio_wk29 */ - {PAD0_SYS_BOOT6, (IEN | M3)}, /* gpio_wk9 */ - {PAD1_SYS_BOOT7, (IEN | M3)}, /* gpio_wk10 */ - {PAD1_FREF_CLK3_REQ, (M3)}, /* gpio_wk30 */ - {PAD1_FREF_CLK4_REQ, (M3)}, /* gpio_wk7 */ - {PAD0_FREF_CLK4_OUT, (M3)}, /* gpio_wk8 */ + +/* + * This pad keeps C2C Module always enabled. + * Putting this in safe mode do not cause the issue. + * C2C driver could enable this mux setting if needed. + */ + {LLIA_WAKEREQIN, (M7)}, /* SAFE MODE */ + {LLIB_WAKEREQIN, (M7)}, /* SAFE MODE */ + {DRM_EMU0, (PTU | IEN | M0)}, /* DRM_EMU0 */ + {DRM_EMU1, (PTU | IEN | M0)}, /* DRM_EMU1 */ + {JTAG_NTRST, (IEN | M0)}, /* JTAG_NTRST */ + {JTAG_TCK, (IEN | M0)}, /* JTAG_TCK */ + {JTAG_RTCK, (M0)}, /* JTAG_RTCK */ + {JTAG_TMSC, (IEN | M0)}, /* JTAG_TMSC */ + {JTAG_TDI, (IEN | M0)}, /* JTAG_TDI */ + {JTAG_TDO, (M0)}, /* JTAG_TDO */ + {FREF_CLK_IOREQ, (IEN | M0)}, /* FREF_CLK_IOREQ */ + {FREF_CLK0_OUT, (M0)}, /* FREF_CLK0_OUT */ + {FREF_CLK1_OUT, (M0)}, /* FREF_CLK1_OUT */ + {FREF_CLK2_OUT, (M0)}, /* FREF_CLK2_OUT */ + {FREF_CLK2_REQ, (PTU | IEN | M6)}, /* GPIO1_WK9 */ + {FREF_CLK1_REQ, (PTD | IEN | M6)}, /* GPIO1_WK8 */ + {SYS_NRESPWRON, (IEN | M0)}, /* SYS_NRESPWRON */ + {SYS_NRESWARM, (PTU | IEN | M0)}, /* SYS_NRESWARM */ + {SYS_PWR_REQ, (M0)}, /* SYS_PWR_REQ */ + {SYS_NIRQ1, (PTU | IEN | M0)}, /* SYS_NIRQ1 */ + {SYS_NIRQ2, (PTU | IEN | M0)}, /* SYS_NIRQ2 */ + {SYS_BOOT0, (IEN | M0)}, /* SYS_BOOT0 */ + {SYS_BOOT1, (IEN | M0)}, /* SYS_BOOT1 */ + {SYS_BOOT2, (IEN | M0)}, /* SYS_BOOT2 */ + {SYS_BOOT3, (IEN | M0)}, /* SYS_BOOT3 */ + {SYS_BOOT4, (IEN | M0)}, /* SYS_BOOT4 */ + {SYS_BOOT5, (IEN | M0)}, /* SYS_BOOT5 */ + }; #endif /* _EVM4430_MUX_DATA_H */ |
