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-rw-r--r--board/freescale/corenet_ds/corenet_ds.c17
1 files changed, 3 insertions, 14 deletions
diff --git a/board/freescale/corenet_ds/corenet_ds.c b/board/freescale/corenet_ds/corenet_ds.c
index fffb0c817a..60e2100af3 100644
--- a/board/freescale/corenet_ds/corenet_ds.c
+++ b/board/freescale/corenet_ds/corenet_ds.c
@@ -27,8 +27,10 @@ int checkboard (void)
{
u8 sw;
struct cpu_type *cpu = gd->arch.cpu;
- ccsr_gur_t *gur = (void *)CONFIG_SYS_MPC85xx_GUTS_ADDR;
+#if defined(CONFIG_P3041DS) || defined(CONFIG_P5020DS) || \
+ defined(CONFIG_P5040DS)
unsigned int i;
+#endif
static const char * const freq[] = {"100", "125", "156.25", "212.5" };
printf("Board: %sDS, ", cpu->name);
@@ -47,19 +49,6 @@ int checkboard (void)
else
printf("invalid setting of SW%u\n", PIXIS_LBMAP_SWITCH);
- /* Display the RCW, so that no one gets confused as to what RCW
- * we're actually using for this boot.
- */
- puts("Reset Configuration Word (RCW):");
- for (i = 0; i < ARRAY_SIZE(gur->rcwsr); i++) {
- u32 rcw = in_be32(&gur->rcwsr[i]);
-
- if ((i % 4) == 0)
- printf("\n %08x:", i * 4);
- printf(" %08x", rcw);
- }
- puts("\n");
-
/* Display the actual SERDES reference clocks as configured by the
* dip switches on the board. Note that the SWx registers could
* technically be set to force the reference clocks to match the
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