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-rw-r--r--arch/x86/cpu/quark/Makefile1
-rw-r--r--arch/x86/cpu/quark/pci.c70
-rw-r--r--arch/x86/cpu/quark/quark.c5
3 files changed, 0 insertions, 76 deletions
diff --git a/arch/x86/cpu/quark/Makefile b/arch/x86/cpu/quark/Makefile
index e87b4248e6..8f1d018fb6 100644
--- a/arch/x86/cpu/quark/Makefile
+++ b/arch/x86/cpu/quark/Makefile
@@ -6,4 +6,3 @@
obj-y += car.o dram.o msg_port.o quark.o
obj-y += mrc.o mrc_util.o hte.o smc.o
-obj-$(CONFIG_PCI) += pci.o
diff --git a/arch/x86/cpu/quark/pci.c b/arch/x86/cpu/quark/pci.c
deleted file mode 100644
index 354e15a990..0000000000
--- a/arch/x86/cpu/quark/pci.c
+++ /dev/null
@@ -1,70 +0,0 @@
-/*
- * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <pci.h>
-#include <asm/pci.h>
-#include <asm/arch/device.h>
-
-DECLARE_GLOBAL_DATA_PTR;
-
-void board_pci_setup_hose(struct pci_controller *hose)
-{
- hose->first_busno = 0;
- hose->last_busno = 0;
-
- /* PCI memory space */
- pci_set_region(hose->regions + 0,
- CONFIG_PCI_MEM_BUS,
- CONFIG_PCI_MEM_PHYS,
- CONFIG_PCI_MEM_SIZE,
- PCI_REGION_MEM);
-
- /* PCI IO space */
- pci_set_region(hose->regions + 1,
- CONFIG_PCI_IO_BUS,
- CONFIG_PCI_IO_PHYS,
- CONFIG_PCI_IO_SIZE,
- PCI_REGION_IO);
-
- pci_set_region(hose->regions + 2,
- CONFIG_PCI_PREF_BUS,
- CONFIG_PCI_PREF_PHYS,
- CONFIG_PCI_PREF_SIZE,
- PCI_REGION_PREFETCH);
-
- pci_set_region(hose->regions + 3,
- 0,
- 0,
- gd->ram_size,
- PCI_REGION_MEM | PCI_REGION_SYS_MEMORY);
-
- hose->region_count = 4;
-}
-
-int board_pci_post_scan(struct pci_controller *hose)
-{
- return 0;
-}
-
-int pci_skip_dev(struct pci_controller *hose, pci_dev_t dev)
-{
- /*
- * TODO:
- *
- * For some unknown reason, the PCI enumeration process hangs
- * when it scans to the PCIe root port 0 (D23:F0) & 1 (D23:F1).
- *
- * For now we just skip these two devices, and this needs to
- * be revisited later.
- */
- if (dev == QUARK_HOST_BRIDGE ||
- dev == QUARK_PCIE0 || dev == QUARK_PCIE1) {
- return 1;
- }
-
- return 0;
-}
diff --git a/arch/x86/cpu/quark/quark.c b/arch/x86/cpu/quark/quark.c
index 7c55d9e5cd..dda3c7c7fc 100644
--- a/arch/x86/cpu/quark/quark.c
+++ b/arch/x86/cpu/quark/quark.c
@@ -136,7 +136,6 @@ static void quark_enable_legacy_seg(void)
int arch_cpu_init(void)
{
- struct pci_controller *hose;
int ret;
post_code(POST_CPU_INIT);
@@ -148,10 +147,6 @@ int arch_cpu_init(void)
if (ret)
return ret;
- ret = pci_early_init_hose(&hose);
- if (ret)
- return ret;
-
/*
* Quark SoC has some non-standard BARs (excluding PCI standard BARs)
* which need be initialized with suggested values
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