diff options
Diffstat (limited to 'arch/arm/mach-orion5x')
| -rw-r--r-- | arch/arm/mach-orion5x/Kconfig | 1 | ||||
| -rw-r--r-- | arch/arm/mach-orion5x/cpu.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-orion5x/include/mach/cpu.h | 2 | ||||
| -rw-r--r-- | arch/arm/mach-orion5x/lowlevel_init.S | 14 |
4 files changed, 16 insertions, 3 deletions
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig index 5a542629c7..291c511ba8 100644 --- a/arch/arm/mach-orion5x/Kconfig +++ b/arch/arm/mach-orion5x/Kconfig @@ -5,6 +5,7 @@ choice config TARGET_EDMINIV2 bool "LaCie Ethernet Disk mini V2" + select SUPPORT_SPL endchoice diff --git a/arch/arm/mach-orion5x/cpu.c b/arch/arm/mach-orion5x/cpu.c index f88db3b1f9..2ecd385678 100644 --- a/arch/arm/mach-orion5x/cpu.c +++ b/arch/arm/mach-orion5x/cpu.c @@ -234,7 +234,9 @@ int arch_cpu_init(void) /* Enable and invalidate L2 cache in write through mode */ invalidate_l2_cache(); +#ifdef CONFIG_SPL_BUILD orion5x_config_adr_windows(); +#endif return 0; } diff --git a/arch/arm/mach-orion5x/include/mach/cpu.h b/arch/arm/mach-orion5x/include/mach/cpu.h index 08a450f1f3..092dbd66a1 100644 --- a/arch/arm/mach-orion5x/include/mach/cpu.h +++ b/arch/arm/mach-orion5x/include/mach/cpu.h @@ -86,7 +86,7 @@ enum orion5x_cpu_attrib { #endif #if !defined (ORION5X_ADR_PCIE_IO_REMAP_LO) -#define ORION5X_ADR_PCIE_IO_REMAP_LO 0x90000000 +#define ORION5X_ADR_PCIE_IO_REMAP_LO 0xf0000000 #endif #if !defined (ORION5X_ADR_PCIE_IO_REMAP_HI) diff --git a/arch/arm/mach-orion5x/lowlevel_init.S b/arch/arm/mach-orion5x/lowlevel_init.S index 4dacc296e4..51a8b3c51b 100644 --- a/arch/arm/mach-orion5x/lowlevel_init.S +++ b/arch/arm/mach-orion5x/lowlevel_init.S @@ -62,14 +62,16 @@ /* * Low-level init happens right after start.S has switched to SVC32, * flushed and disabled caches and disabled MMU. We're still running - * from the boot chip select, so the first thing we should do is set - * up RAM for us to relocate into. + * from the boot chip select, so the first thing SPL should do is to + * set up the RAM to copy U-Boot into. */ .globl lowlevel_init lowlevel_init: +#ifdef CONFIG_SPL_BUILD + /* Use 'r4 as the base for internal register accesses */ ldr r4, =ORION5X_REGS_PHY_BASE @@ -273,5 +275,13 @@ lowlevel_init: orr r2, r2, r6 str r2, [r3, #0x484] + /* enable for 2 GB DDR; detection should find out real amount */ + sub r6, r6, r6 + str r6, [r3, #0x500] + ldr r6, =0x7fff0001 + str r6, [r3, #0x504] + +#endif /* CONFIG_SPL_BUILD */ + /* Return to U-boot via saved link register */ mov pc, lr |
