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Diffstat (limited to 'arch/arm/cpu/arm926ejs/armada100/timer.c')
-rw-r--r--arch/arm/cpu/arm926ejs/armada100/timer.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm/cpu/arm926ejs/armada100/timer.c b/arch/arm/cpu/arm926ejs/armada100/timer.c
index 18ffd0c700..948607f8c0 100644
--- a/arch/arm/cpu/arm926ejs/armada100/timer.c
+++ b/arch/arm/cpu/arm926ejs/armada100/timer.c
@@ -61,7 +61,7 @@ struct armd1tmr_registers {
#define COUNT_RD_REQ 0x1
DECLARE_GLOBAL_DATA_PTR;
-/* Using gd->arch.tbu from timestamp and gd->tbl for lastdec */
+/* Using gd->arch.tbu from timestamp and gd->arch.tbl for lastdec */
/* For preventing risk of instability in reading counter value,
* first set read request to register cvwr and then read same
@@ -82,14 +82,14 @@ ulong get_timer_masked(void)
{
ulong now = read_timer();
- if (now >= gd->tbl) {
+ if (now >= gd->arch.tbl) {
/* normal mode */
- gd->arch.tbu += now - gd->tbl;
+ gd->arch.tbu += now - gd->arch.tbl;
} else {
/* we have an overflow ... */
- gd->arch.tbu += now + TIMER_LOAD_VAL - gd->tbl;
+ gd->arch.tbu += now + TIMER_LOAD_VAL - gd->arch.tbl;
}
- gd->tbl = now;
+ gd->arch.tbl = now;
return gd->arch.tbu;
}
@@ -135,8 +135,8 @@ int timer_init(void)
/* Enable timer 0 */
writel(0x1, &armd1timers->cer);
- /* init the gd->arch.tbu and gd->tbl value */
- gd->tbl = read_timer();
+ /* init the gd->arch.tbu and gd->arch.tbl value */
+ gd->arch.tbl = read_timer();
gd->arch.tbu = 0;
return 0;
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