diff options
Diffstat (limited to 'arch/arm/cpu/arm920t')
| -rw-r--r-- | arch/arm/cpu/arm920t/s3c24x0/timer.c | 64 | ||||
| -rw-r--r-- | arch/arm/cpu/arm920t/u-boot.lds | 88 |
2 files changed, 20 insertions, 132 deletions
diff --git a/arch/arm/cpu/arm920t/s3c24x0/timer.c b/arch/arm/cpu/arm920t/s3c24x0/timer.c index 9571870b11..d8668bec5e 100644 --- a/arch/arm/cpu/arm920t/s3c24x0/timer.c +++ b/arch/arm/cpu/arm920t/s3c24x0/timer.c @@ -35,19 +35,7 @@ #include <asm/io.h> #include <asm/arch/s3c24x0_cpu.h> -int timer_load_val = 0; -static ulong timer_clk; - -/* macro to read the 16 bit timer */ -static inline ulong READ_TIMER(void) -{ - struct s3c24x0_timers *timers = s3c24x0_get_base_timers(); - - return readl(&timers->tcnto4) & 0xffff; -} - -static ulong timestamp; -static ulong lastdec; +DECLARE_GLOBAL_DATA_PTR; int timer_init(void) { @@ -57,27 +45,27 @@ int timer_init(void) /* use PWM Timer 4 because it has no output */ /* prescaler for Timer 4 is 16 */ writel(0x0f00, &timers->tcfg0); - if (timer_load_val == 0) { + if (gd->tbu == 0) { /* * for 10 ms clock period @ PCLK with 4 bit divider = 1/2 * (default) and prescaler = 16. Should be 10390 * @33.25MHz and 15625 @ 50 MHz */ - timer_load_val = get_PCLK() / (2 * 16 * 100); - timer_clk = get_PCLK() / (2 * 16); + gd->tbu = get_PCLK() / (2 * 16 * 100); + gd->timer_rate_hz = get_PCLK() / (2 * 16); } /* load value for 10 ms timeout */ - lastdec = timer_load_val; - writel(timer_load_val, &timers->tcntb4); + writel(gd->tbu, &timers->tcntb4); /* auto load, manual update of timer 4 */ tmr = (readl(&timers->tcon) & ~0x0700000) | 0x0600000; writel(tmr, &timers->tcon); /* auto load, start timer 4 */ tmr = (tmr & ~0x0700000) | 0x0500000; writel(tmr, &timers->tcon); - timestamp = 0; + gd->lastinc = 0; + gd->tbl = 0; - return (0); + return 0; } /* @@ -94,7 +82,7 @@ void __udelay (unsigned long usec) ulong start = get_ticks(); tmo = usec / 1000; - tmo *= (timer_load_val * 100); + tmo *= (gd->tbu * 100); tmo /= 1000; while ((ulong) (get_ticks() - start) < tmo) @@ -105,7 +93,7 @@ ulong get_timer_masked(void) { ulong tmr = get_ticks(); - return tmr / (timer_clk / CONFIG_SYS_HZ); + return tmr / (gd->timer_rate_hz / CONFIG_SYS_HZ); } void udelay_masked(unsigned long usec) @@ -116,10 +104,10 @@ void udelay_masked(unsigned long usec) if (usec >= 1000) { tmo = usec / 1000; - tmo *= (timer_load_val * 100); + tmo *= (gd->tbu * 100); tmo /= 1000; } else { - tmo = usec * (timer_load_val * 100); + tmo = usec * (gd->tbu * 100); tmo /= (1000 * 1000); } @@ -137,18 +125,19 @@ void udelay_masked(unsigned long usec) */ unsigned long long get_ticks(void) { - ulong now = READ_TIMER(); + struct s3c24x0_timers *timers = s3c24x0_get_base_timers(); + ulong now = readl(&timers->tcnto4) & 0xffff; - if (lastdec >= now) { + if (gd->lastinc >= now) { /* normal mode */ - timestamp += lastdec - now; + gd->tbl += gd->lastinc - now; } else { /* we have an overflow ... */ - timestamp += lastdec + timer_load_val - now; + gd->tbl += gd->lastinc + gd->tbu - now; } - lastdec = now; + gd->lastinc = now; - return timestamp; + return gd->tbl; } /* @@ -157,20 +146,7 @@ unsigned long long get_ticks(void) */ ulong get_tbclk(void) { - ulong tbclk; - -#if defined(CONFIG_SMDK2400) - tbclk = timer_load_val * 100; -#elif defined(CONFIG_SBC2410X) || \ - defined(CONFIG_SMDK2410) || \ - defined(CONFIG_S3C2440) || \ - defined(CONFIG_VCMA9) - tbclk = CONFIG_SYS_HZ; -#else -# error "tbclk not configured" -#endif - - return tbclk; + return CONFIG_SYS_HZ; } /* diff --git a/arch/arm/cpu/arm920t/u-boot.lds b/arch/arm/cpu/arm920t/u-boot.lds deleted file mode 100644 index 17ba60423b..0000000000 --- a/arch/arm/cpu/arm920t/u-boot.lds +++ /dev/null @@ -1,88 +0,0 @@ -/* - * (c) Copyright 2004 - * Techware Information Technology, Inc. - * Ming-Len Wu <minglen_wu@techware.com.tw> - * - * (C) Copyright 2000-2004 - * Wolfgang Denk, DENX Software Engineering, wd@denx.de. - * - * (C) Copyright 2002 - * Gary Jennejohn, DENX Software Engineering, <gj@denx.de> - * - * See file CREDITS for list of people who contributed to this - * project. - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, - * MA 02111-1307 USA - * - */ - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -ENTRY(_start) -SECTIONS -{ - . = 0x00000000; - - . = ALIGN(4); - .text : - { - arch/arm/cpu/arm920t/start.o (.text) - *(.text) - } - - . = ALIGN(4); - .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } - - . = ALIGN(4); - .data : { - *(.data) - } - - . = ALIGN(4); - - . = .; - __u_boot_cmd_start = .; - .u_boot_cmd : { *(.u_boot_cmd) } - __u_boot_cmd_end = .; - - . = ALIGN(4); - - .rel.dyn : { - __rel_dyn_start = .; - *(.rel*) - __rel_dyn_end = .; - } - - .dynsym : { - __dynsym_start = .; - *(.dynsym) - } - - _end = .; - - .bss __rel_dyn_start (OVERLAY) : { - __bss_start = .; - *(.bss) - . = ALIGN(4); - __bss_end__ = .; - } - - /DISCARD/ : { *(.dynstr*) } - /DISCARD/ : { *(.dynamic*) } - /DISCARD/ : { *(.plt*) } - /DISCARD/ : { *(.interp*) } - /DISCARD/ : { *(.gnu*) } -} |
