summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--board/xilinx/xupv2p/Makefile21
-rw-r--r--board/xilinx/xupv2p/config.mk6
-rw-r--r--board/xilinx/xupv2p/xparameters.h27
-rw-r--r--include/configs/xupv2p.h57
4 files changed, 72 insertions, 39 deletions
diff --git a/board/xilinx/xupv2p/Makefile b/board/xilinx/xupv2p/Makefile
index 9ab5633626..99e7047350 100644
--- a/board/xilinx/xupv2p/Makefile
+++ b/board/xilinx/xupv2p/Makefile
@@ -22,32 +22,17 @@
#
include $(TOPDIR)/config.mk
-ifneq ($(OBJTREE),$(SRCTREE))
-$(shell mkdir -p $(obj)../common)
-$(shell mkdir -p $(obj)../xilinx_enet)
-endif
-
-INCS := -I../common -I../xilinx_enet
-CFLAGS += $(INCS)
-HOST_CFLAGS += $(INCS)
LIB = $(obj)lib$(BOARD).a
-COBJS = $(BOARD).o \
- ../xilinx_enet/emac_adapter.o ../xilinx_enet/xemac.o \
- ../xilinx_enet/xemac_options.o ../xilinx_enet/xemac_polled.o \
- ../xilinx_enet/xemac_intr.o ../xilinx_enet/xemac_g.o \
- ../xilinx_enet/xemac_intr_dma.o ../common/xipif_v1_23_b.o \
- ../common/xbasic_types.o ../common/xdma_channel.o \
- ../common/xdma_channel_sg.o ../common/xpacket_fifo_v1_00_b.o \
- ../common/xversion.o \
+COBJS = $(BOARD).o
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
OBJS := $(addprefix $(obj),$(COBJS))
SOBJS := $(addprefix $(obj),$(SOBJS))
-$(LIB): $(OBJS) $(SOBJS)
- $(AR) $(ARFLAGS) $@ $^
+$(LIB): $(obj).depend $(OBJS)
+ $(AR) $(ARFLAGS) $@ $(OBJS)
clean:
rm -f $(SOBJS) $(OBJS)
diff --git a/board/xilinx/xupv2p/config.mk b/board/xilinx/xupv2p/config.mk
index c07b0b35b1..eedfb24d4f 100644
--- a/board/xilinx/xupv2p/config.mk
+++ b/board/xilinx/xupv2p/config.mk
@@ -25,8 +25,8 @@
# Version: Xilinx EDK 8.2.02 EDK_Im_Sp2.4
#
-TEXT_BASE = 0x38000000
+TEXT_BASE = 0x30000000
+PLATFORM_CPPFLAGS += -mxl-pattern-compare
PLATFORM_CPPFLAGS += -mno-xl-soft-mul
-PLATFORM_CPPFLAGS += -mno-xl-soft-div
-PLATFORM_CPPFLAGS += -mxl-barrel-shift
+PLATFORM_CPPFLAGS += -mcpu=v5.00.c
diff --git a/board/xilinx/xupv2p/xparameters.h b/board/xilinx/xupv2p/xparameters.h
index a96c693c55..0bb7a805f4 100644
--- a/board/xilinx/xupv2p/xparameters.h
+++ b/board/xilinx/xupv2p/xparameters.h
@@ -28,17 +28,24 @@
/* System Clock Frequency */
#define XILINX_CLOCK_FREQ 100000000
+/* Microblaze is microblaze_0 */
+#define XILINX_USE_MSR_INSTR 1
+#define XILINX_PVR 0
+#define XILINX_FSL_NUMBER 0
+
/* Interrupt controller is opb_intc_0 */
#define XILINX_INTC_BASEADDR 0x41200000
-#define XILINX_INTC_NUM_INTR_INPUTS 11
+#define XILINX_INTC_NUM_INTR_INPUTS 7
/* Timer pheriphery is opb_timer_1 */
#define XILINX_TIMER_BASEADDR 0x41c00000
-#define XILINX_TIMER_IRQ 1
+#define XILINX_TIMER_IRQ 0
/* Uart pheriphery is RS232_Uart_1 */
-#define XILINX_UART_BASEADDR 0x40600000
-#define XILINX_UART_BAUDRATE 115200
+#define XILINX_UARTLITE_BASEADDR 0x40600000
+#define XILINX_UARTLITE_BAUDRATE 115200
+
+/* IIC doesn't exist */
/* GPIO is LEDs_4Bit*/
#define XILINX_GPIO_BASEADDR 0x40000000
@@ -51,14 +58,10 @@
/* Sysace Controller is SysACE_CompactFlash */
#define XILINX_SYSACE_BASEADDR 0x41800000
-#define XILINX_SYSACE_HIGHADDR 0x4180ffff
#define XILINX_SYSACE_MEM_WIDTH 16
/* Ethernet controller is Ethernet_MAC */
-#define XPAR_XEMAC_NUM_INSTANCES 1
-#define XPAR_OPB_ETHERNET_0_DEVICE_ID 0
-#define XPAR_OPB_ETHERNET_0_BASEADDR 0x40c00000
-#define XPAR_OPB_ETHERNET_0_HIGHADDR 0x40c0ffff
-#define XPAR_OPB_ETHERNET_0_DMA_PRESENT 1
-#define XPAR_OPB_ETHERNET_0_ERR_COUNT_EXIST 1
-#define XPAR_OPB_ETHERNET_0_MII_EXIST 1
+#define XILINX_EMAC_BASEADDR 0x40c00000
+#define XILINX_EMAC_DMA_PRESENT 3
+#define XILINX_EMAC_HALF_DUPLEX_EXIST 1
+#define XILINX_EMAC_MII_EXIST 1
diff --git a/include/configs/xupv2p.h b/include/configs/xupv2p.h
index b4c720d18b..25fa495641 100644
--- a/include/configs/xupv2p.h
+++ b/include/configs/xupv2p.h
@@ -31,13 +31,33 @@
#define CONFIG_XUPV2P 1
/* uart */
-#define CONFIG_SERIAL_BASE XILINX_UART_BASEADDR
-#define CONFIG_BAUDRATE XILINX_UART_BAUDRATE
+#ifdef XILINX_UARTLITE_BASEADDR
+#define CONFIG_SERIAL_BASE XILINX_UARTLITE_BASEADDR
+#define CONFIG_BAUDRATE XILINX_UARTLITE_BAUDRATE
#define CFG_BAUDRATE_TABLE { CONFIG_BAUDRATE }
+#else
+#ifdef XILINX_UART16550_BASEADDR
+#define CFG_NS16550
+#define CFG_NS16550_SERIAL
+#define CFG_NS16550_REG_SIZE 4
+#define CONFIG_CONS_INDEX 1
+#define CFG_NS16550_COM1 XILINX_UART16550_BASEADDR
+#define CFG_NS16550_CLK XILINX_UART16550_CLOCK_HZ
+
+#define CONFIG_BAUDRATE 115200
+#define CFG_BAUDRATE_TABLE { 9600, 115200 }
+#endif
+#endif
/* ethernet */
-#define CONFIG_EMAC 1
-#define XPAR_EMAC_0_DEVICE_ID XPAR_XEMAC_NUM_INSTANCES
+#ifdef XILINX_EMAC_BASEADDR
+#define XILINX_EMAC 1
+#else
+#ifdef XILINX_EMACLITE_BASEADDR
+#define XILINX_EMACLITE 1
+#endif
+#endif
+#undef ET_DEBUG
/*
* setting reset address
@@ -48,11 +68,13 @@
* U-BOOT auto-relocate to TEXT_BASE. After RESET command Microblaze
* jump to CFG_RESET_ADDRESS where is the original U-BOOT code.
*/
-#define CFG_RESET_ADDRESS 0x36000000
+/* #define CFG_RESET_ADDRESS 0x36000000 */
/* gpio */
+#ifdef XILINX_GPIO_BASEADDR
#define CFG_GPIO_0 1
#define CFG_GPIO_0_ADDR XILINX_GPIO_BASEADDR
+#endif
/* interrupt controller */
#define CFG_INTC_0 1
@@ -118,6 +140,25 @@
#define CFG_ENV_IS_NOWHERE 1
#define CFG_ENV_SIZE 0x1000
#define CFG_ENV_ADDR (CFG_MONITOR_BASE - CFG_ENV_SIZE)
+#ifndef XILINX_SYSACE_BASEADDR
+#define CONFIG_COMMANDS (CONFIG__CMD_DFL |\
+ CFG_CMD_MEMORY |\
+ CFG_CMD_IRQ |\
+ CFG_CMD_BDI |\
+ CFG_CMD_NET |\
+ CFG_CMD_IMI |\
+ CFG_CMD_ECHO |\
+ CFG_CMD_CACHE |\
+ CFG_CMD_RUN |\
+ CFG_CMD_AUTOSCRIPT |\
+ CFG_CMD_ASKENV |\
+ CFG_CMD_LOADS |\
+ CFG_CMD_LOADB |\
+ CFG_CMD_MISC |\
+ CFG_CMD_MFSL |\
+ CFG_CMD_PING \
+ )
+#else
#define CONFIG_COMMANDS (CONFIG__CMD_DFL |\
CFG_CMD_MEMORY |\
CFG_CMD_IRQ |\
@@ -134,8 +175,10 @@
CFG_CMD_MISC |\
CFG_CMD_FAT |\
CFG_CMD_EXT2 |\
+ CFG_CMD_MFSL |\
CFG_CMD_PING \
)
+#endif
/* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
#include <cmd_confdefs.h>
@@ -150,7 +193,7 @@
#define CONFIG_BOOTDELAY 30
#define CONFIG_BOOTARGS "root=romfs"
-#define CONFIG_HOSTNAME "ml401"
+#define CONFIG_HOSTNAME "xupv2p"
#define CONFIG_BOOTCOMMAND "base 0;tftp 11000000 image.img;bootm"
#define CONFIG_IPADDR 192.168.0.3
#define CONFIG_SERVERIP 192.168.0.5
@@ -166,11 +209,13 @@
"echo"
/* system ace */
+#ifdef XILINX_SYSACE_BASEADDR
#define CONFIG_SYSTEMACE
/* #define DEBUG_SYSTEMACE */
#define SYSTEMACE_CONFIG_FPGA
#define CFG_SYSTEMACE_BASE XILINX_SYSACE_BASEADDR
#define CFG_SYSTEMACE_WIDTH XILINX_SYSACE_MEM_WIDTH
#define CONFIG_DOS_PARTITION
+#endif
#endif /* __CONFIG_H */
OpenPOWER on IntegriCloud