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-rw-r--r--arch/x86/cpu/coreboot/pci.c11
-rw-r--r--arch/x86/dts/chromebook_link.dts2
2 files changed, 12 insertions, 1 deletions
diff --git a/arch/x86/cpu/coreboot/pci.c b/arch/x86/cpu/coreboot/pci.c
index fa415dd42b..67eb14ce99 100644
--- a/arch/x86/cpu/coreboot/pci.c
+++ b/arch/x86/cpu/coreboot/pci.c
@@ -34,3 +34,14 @@ U_BOOT_DRIVER(pci_x86_drv) = {
.of_match = pci_x86_ids,
.ops = &pci_x86_ops,
};
+
+static const struct udevice_id generic_pch_ids[] = {
+ { .compatible = "intel,pch" },
+ { }
+};
+
+U_BOOT_DRIVER(generic_pch_drv) = {
+ .name = "pch",
+ .id = UCLASS_PCH,
+ .of_match = generic_pch_ids,
+};
diff --git a/arch/x86/dts/chromebook_link.dts b/arch/x86/dts/chromebook_link.dts
index b450c3c55f..7c7034c7eb 100644
--- a/arch/x86/dts/chromebook_link.dts
+++ b/arch/x86/dts/chromebook_link.dts
@@ -181,7 +181,7 @@
pch {
reg = <0x0000f800 0 0 0 0>;
- compatible = "intel,bd82x6x";
+ compatible = "intel,bd82x6x", "intel,pch";
u-boot,dm-pre-reloc;
#address-cells = <1>;
#size-cells = <1>;
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