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-rw-r--r--board/freescale/mpc8536ds/mpc8536ds.c39
-rw-r--r--board/freescale/mpc8544ds/mpc8544ds.c16
-rw-r--r--board/freescale/mpc8572ds/mpc8572ds.c26
-rw-r--r--board/freescale/p2020ds/p2020ds.c23
-rw-r--r--include/configs/MPC8536DS.h7
-rw-r--r--include/configs/MPC8544DS.h2
-rw-r--r--include/configs/MPC8572DS.h5
-rw-r--r--include/configs/P2020DS.h5
8 files changed, 109 insertions, 14 deletions
diff --git a/board/freescale/mpc8536ds/mpc8536ds.c b/board/freescale/mpc8536ds/mpc8536ds.c
index 28b27ee8f1..66f095f7a0 100644
--- a/board/freescale/mpc8536ds/mpc8536ds.c
+++ b/board/freescale/mpc8536ds/mpc8536ds.c
@@ -60,10 +60,41 @@ int board_early_init_f (void)
int checkboard (void)
{
- printf ("Board: MPC8536DS, System ID: 0x%02x, "
- "System Version: 0x%02x, FPGA Version: 0x%02x\n",
- in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER),
- in8(PIXIS_BASE + PIXIS_PVER));
+ u8 vboot;
+ u8 *pixis_base = (u8 *)PIXIS_BASE;
+
+ puts("Board: MPC8536DS ");
+#ifdef CONFIG_PHYS_64BIT
+ puts("(36-bit addrmap) ");
+#endif
+
+ printf ("Sys ID: 0x%02x, "
+ "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
+ in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER),
+ in_8(pixis_base + PIXIS_PVER));
+
+ vboot = in_8(pixis_base + PIXIS_VBOOT);
+ switch ((vboot & PIXIS_VBOOT_LBMAP) >> 5) {
+ case PIXIS_VBOOT_LBMAP_NOR0:
+ puts ("vBank: 0\n");
+ break;
+ case PIXIS_VBOOT_LBMAP_NOR1:
+ puts ("vBank: 1\n");
+ break;
+ case PIXIS_VBOOT_LBMAP_NOR2:
+ puts ("vBank: 2\n");
+ break;
+ case PIXIS_VBOOT_LBMAP_NOR3:
+ puts ("vBank: 3\n");
+ break;
+ case PIXIS_VBOOT_LBMAP_PJET:
+ puts ("Promjet\n");
+ break;
+ case PIXIS_VBOOT_LBMAP_NAND:
+ puts ("NAND\n");
+ break;
+ }
+
return 0;
}
diff --git a/board/freescale/mpc8544ds/mpc8544ds.c b/board/freescale/mpc8544ds/mpc8544ds.c
index 34bdbade7d..b251e2e587 100644
--- a/board/freescale/mpc8544ds/mpc8544ds.c
+++ b/board/freescale/mpc8544ds/mpc8544ds.c
@@ -43,14 +43,22 @@ int checkboard (void)
volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
volatile ccsr_lbc_t *lbc = (void *)(CONFIG_SYS_MPC85xx_LBC_ADDR);
volatile ccsr_local_ecm_t *ecm = (void *)(CONFIG_SYS_MPC85xx_ECM_ADDR);
+ u8 vboot;
+ u8 *pixis_base = (u8 *)PIXIS_BASE;
if ((uint)&gur->porpllsr != 0xe00e0000) {
printf("immap size error %lx\n",(ulong)&gur->porpllsr);
}
- printf ("Board: MPC8544DS, System ID: 0x%02x, "
- "System Version: 0x%02x, FPGA Version: 0x%02x\n",
- in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER),
- in8(PIXIS_BASE + PIXIS_PVER));
+ printf ("Board: MPC8544DS, Sys ID: 0x%02x, "
+ "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
+ in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER),
+ in_8(pixis_base + PIXIS_PVER));
+
+ vboot = in_8(pixis_base + PIXIS_VBOOT);
+ if (vboot & PIXIS_VBOOT_FMAP)
+ printf ("vBank: %d\n", ((vboot & PIXIS_VBOOT_FBANK) >> 6));
+ else
+ puts ("Promjet\n");
lbc->ltesr = 0xffffffff; /* Clear LBC error interrupts */
lbc->lteir = 0xffffffff; /* Enable LBC error interrupts */
diff --git a/board/freescale/mpc8572ds/mpc8572ds.c b/board/freescale/mpc8572ds/mpc8572ds.c
index 4b956171fe..51231d7a41 100644
--- a/board/freescale/mpc8572ds/mpc8572ds.c
+++ b/board/freescale/mpc8572ds/mpc8572ds.c
@@ -42,14 +42,34 @@ long int fixed_sdram(void);
int checkboard (void)
{
+ u8 vboot;
+ u8 *pixis_base = (u8 *)PIXIS_BASE;
+
puts ("Board: MPC8572DS ");
#ifdef CONFIG_PHYS_64BIT
puts ("(36-bit addrmap) ");
#endif
printf ("Sys ID: 0x%02x, "
- "Sys Ver: 0x%02x, FPGA Ver: 0x%02x\n",
- in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER),
- in8(PIXIS_BASE + PIXIS_PVER));
+ "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
+ in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER),
+ in_8(pixis_base + PIXIS_PVER));
+
+ vboot = in_8(pixis_base + PIXIS_VBOOT);
+ switch ((vboot & PIXIS_VBOOT_LBMAP) >> 6) {
+ case PIXIS_VBOOT_LBMAP_NOR0:
+ puts ("vBank: 0\n");
+ break;
+ case PIXIS_VBOOT_LBMAP_PJET:
+ puts ("Promjet\n");
+ break;
+ case PIXIS_VBOOT_LBMAP_NAND:
+ puts ("NAND\n");
+ break;
+ case PIXIS_VBOOT_LBMAP_NOR1:
+ puts ("vBank: 1\n");
+ break;
+ }
+
return 0;
}
diff --git a/board/freescale/p2020ds/p2020ds.c b/board/freescale/p2020ds/p2020ds.c
index 293e5a42dc..fdd8325544 100644
--- a/board/freescale/p2020ds/p2020ds.c
+++ b/board/freescale/p2020ds/p2020ds.c
@@ -47,14 +47,31 @@ phys_size_t fixed_sdram(void);
int checkboard(void)
{
+ u8 sw7;
+ u8 *pixis_base = (u8 *)PIXIS_BASE;
+
puts("Board: P2020DS ");
#ifdef CONFIG_PHYS_64BIT
puts("(36-bit addrmap) ");
#endif
+
printf("Sys ID: 0x%02x, "
- "Sys Ver: 0x%02x, FPGA Ver: 0x%02x\n",
- in8(PIXIS_BASE + PIXIS_ID), in8(PIXIS_BASE + PIXIS_VER),
- in8(PIXIS_BASE + PIXIS_PVER));
+ "Sys Ver: 0x%02x, FPGA Ver: 0x%02x, ",
+ in_8(pixis_base + PIXIS_ID), in_8(pixis_base + PIXIS_VER),
+ in_8(pixis_base + PIXIS_PVER));
+
+ sw7 = in_8(pixis_base + PIXIS_SW(7));
+ switch ((sw7 & PIXIS_SW7_LBMAP) >> 6) {
+ case 0:
+ case 1:
+ printf ("vBank: %d\n", ((sw7 & PIXIS_SW7_VBANK) >> 4));
+ break;
+ case 2:
+ case 3:
+ puts ("Promjet\n");
+ break;
+ }
+
return 0;
}
diff --git a/include/configs/MPC8536DS.h b/include/configs/MPC8536DS.h
index bd81532c8d..2cbc6c70a2 100644
--- a/include/configs/MPC8536DS.h
+++ b/include/configs/MPC8536DS.h
@@ -218,6 +218,13 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
#define PIXIS_VCFGEN1 0x13 /* VELA Config Enable 1 */
#define PIXIS_VCORE0 0x14 /* VELA VCORE0 Register */
#define PIXIS_VBOOT 0x16 /* VELA VBOOT Register */
+#define PIXIS_VBOOT_LBMAP 0xe0 /* VBOOT - CFG_LBMAP */
+#define PIXIS_VBOOT_LBMAP_NOR0 0x00 /* cfg_lbmap - boot from NOR 0 */
+#define PIXIS_VBOOT_LBMAP_NOR1 0x01 /* cfg_lbmap - boot from NOR 1 */
+#define PIXIS_VBOOT_LBMAP_NOR2 0x02 /* cfg_lbmap - boot from NOR 2 */
+#define PIXIS_VBOOT_LBMAP_NOR3 0x03 /* cfg_lbmap - boot from NOR 3 */
+#define PIXIS_VBOOT_LBMAP_PJET 0x04 /* cfg_lbmap - boot from projet */
+#define PIXIS_VBOOT_LBMAP_NAND 0x05 /* cfg_lbmap - boot from NAND */
#define PIXIS_VSPEED0 0x17 /* VELA VSpeed 0 */
#define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */
#define PIXIS_VSPEED2 0x19 /* VELA VSpeed 2 */
diff --git a/include/configs/MPC8544DS.h b/include/configs/MPC8544DS.h
index 8d5cfa117e..2efeb72e63 100644
--- a/include/configs/MPC8544DS.h
+++ b/include/configs/MPC8544DS.h
@@ -192,6 +192,8 @@ extern unsigned long get_board_sys_clk(unsigned long dummy);
#define PIXIS_VCFGEN0 0x12 /* VELA Config Enable 0 */
#define PIXIS_VCFGEN1 0x13 /* VELA Config Enable 1 */
#define PIXIS_VBOOT 0x16 /* VELA VBOOT Register */
+#define PIXIS_VBOOT_FMAP 0x80 /* VBOOT - CFG_FLASHMAP */
+#define PIXIS_VBOOT_FBANK 0x40 /* VBOOT - CFG_FLASHBANK */
#define PIXIS_VSPEED0 0x17 /* VELA VSpeed 0 */
#define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */
#define PIXIS_VCLKH 0x19 /* VELA VCLKH register */
diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index 83f9ca9014..64f5c4b750 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -237,6 +237,11 @@ extern unsigned long get_board_ddr_clk(unsigned long dummy);
#define PIXIS_VCFGEN1 0x13 /* VELA Config Enable 1 */
#define PIXIS_VCORE0 0x14 /* VELA VCORE0 Register */
#define PIXIS_VBOOT 0x16 /* VELA VBOOT Register */
+#define PIXIS_VBOOT_LBMAP 0xc0 /* VBOOT - CFG_LBMAP */
+#define PIXIS_VBOOT_LBMAP_NOR0 0x00 /* cfg_lbmap - boot from NOR 0 */
+#define PIXIS_VBOOT_LBMAP_PJET 0x01 /* cfg_lbmap - boot from projet */
+#define PIXIS_VBOOT_LBMAP_NAND 0x02 /* cfg_lbmap - boot from NAND */
+#define PIXIS_VBOOT_LBMAP_NOR1 0x03 /* cfg_lbmap - boot from NOR 1 */
#define PIXIS_VSPEED0 0x17 /* VELA VSpeed 0 */
#define PIXIS_VSPEED1 0x18 /* VELA VSpeed 1 */
#define PIXIS_VSPEED2 0x19 /* VELA VSpeed 2 */
diff --git a/include/configs/P2020DS.h b/include/configs/P2020DS.h
index d4b48d0410..5c2c5cb321 100644
--- a/include/configs/P2020DS.h
+++ b/include/configs/P2020DS.h
@@ -282,6 +282,11 @@ extern unsigned long calculate_board_ddr_clk(unsigned long dummy);
#define PIXIS_VWATCH 0x24 /* Watchdog Register */
#define PIXIS_LED 0x25 /* LED Register */
+#define PIXIS_SW(x) 0x20 + (x - 1) * 2
+#define PIXIS_EN(x) 0x21 + (x - 1) * 2
+#define PIXIS_SW7_LBMAP 0xc0 /* SW7 - cfg_lbmap */
+#define PIXIS_SW7_VBANK 0x30 /* SW7 - cfg_vbank */
+
/* old pixis referenced names */
#define PIXIS_VCLKH 0x19 /* VELA VCLKH register */
#define PIXIS_VCLKL 0x1A /* VELA VCLKL register */
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