diff options
| -rw-r--r-- | README | 6 | ||||
| -rw-r--r-- | arch/x86/cpu/Makefile | 4 | ||||
| -rw-r--r-- | arch/x86/cpu/u-boot.lds | 2 | ||||
| -rw-r--r-- | include/configs/coreboot.h | 1 |
4 files changed, 6 insertions, 7 deletions
@@ -3816,9 +3816,9 @@ Low Level (hardware related) configuration options: be used if available. These functions may be faster under some conditions but may increase the binary size. -- CONFIG_X86_NO_RESET_VECTOR - If defined, the x86 reset vector code is excluded. You will need - to do this when U-Boot is running from Coreboot. +- CONFIG_X86_RESET_VECTOR + If defined, the x86 reset vector code is included. This is not + needed when U-Boot is running from Coreboot. - CONFIG_X86_NO_REAL_MODE If defined, x86 real mode code is omitted. This assumes a diff --git a/arch/x86/cpu/Makefile b/arch/x86/cpu/Makefile index 57324b6174..7b520f8dca 100644 --- a/arch/x86/cpu/Makefile +++ b/arch/x86/cpu/Makefile @@ -29,12 +29,12 @@ include $(TOPDIR)/config.mk LIB = $(obj)lib$(CPU).o START-y = start.o -RESET_OBJS-$(CONFIG_X86_NO_RESET_VECTOR) += resetvec.o start16.o +START-$(CONFIG_X86_RESET_VECTOR) += resetvec.o start16.o COBJS = interrupts.o cpu.o timer.o SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) -START := $(addprefix $(obj),$(START-y) $(RESET_OBJS-)) +START := $(addprefix $(obj),$(START-y)) all: $(obj).depend $(START) $(LIB) diff --git a/arch/x86/cpu/u-boot.lds b/arch/x86/cpu/u-boot.lds index 0c6f0e31d8..2313cd793a 100644 --- a/arch/x86/cpu/u-boot.lds +++ b/arch/x86/cpu/u-boot.lds @@ -86,7 +86,7 @@ SECTIONS __bios_start = LOADADDR(.bios); __bios_size = SIZEOF(.bios); -#ifndef CONFIG_X86_NO_RESET_VECTOR +#ifdef CONFIG_X86_RESET_VECTOR /* * The following expressions place the 16-bit Real-Mode code and diff --git a/include/configs/coreboot.h b/include/configs/coreboot.h index d8aabd4cc8..c7f36ff148 100644 --- a/include/configs/coreboot.h +++ b/include/configs/coreboot.h @@ -37,7 +37,6 @@ #define CONFIG_SYS_COREBOOT #define CONFIG_SHOW_BOOT_PROGRESS #define CONFIG_LAST_STAGE_INIT -#define CONFIG_X86_NO_RESET_VECTOR #define CONFIG_SYS_VSNPRINTF #define CONFIG_INTEL_CORE_ARCH /* Sandy bridge and ivy bridge chipsets. */ #define CONFIG_ZBOOT_32 |
