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authorAlex Porosanu <alexandru.porosanu@freescale.com>2015-05-05 16:48:34 +0300
committerYork Sun <yorksun@freescale.com>2015-08-03 12:06:37 -0700
commit17649e1b94b450f1ab0de7fa14553f390285f291 (patch)
treef1ce0591fdde3de5cc136c45620fff0d709ed7e0 /post/lib_powerpc
parent026a3f1b7ca487bbce632060b8ca9193bb9edf87 (diff)
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drivers/crypto/fsl: change starting entropy delay value
The entropy delay (the length in system clocks of each entropy sample) for the RNG4 block of CAAM is dependent on the frequency of the SoC. By elaborate methods, it has been determined that a good starting value for all platforms integrating the CAAM IP is 3200. Using a higher value has additional benefit of speeding up the process of instantiating the RNG, since the entropy delay will be increased and instantiation of the RNG state handles will be reattempted by the driver. If the starting value is low, for certain platforms, this can lead to a quite lengthy process. This patch changes the starting value of the length of the entropy sample to 3200 system clocks. In addition to this change, the attempted entropy delay values are now printed on the console upon initialization of the RNG block. Signed-off-by: Alex Porosanu <alexandru.porosanu@freescale.com> Acked-by: Ruchika Gupta<ruchika.gupta@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
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