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authorStephen Warren <swarren@wwwdotorg.org>2016-03-24 22:15:20 -0600
committerTom Rini <trini@konsulko.com>2016-04-01 17:17:42 -0400
commitf031f501efa898ad1eac641cb27079dd6ded306a (patch)
tree6b2380a6118b4e2cc1ce51ce3d8c6762040e98f0 /include
parent95a2ddaea5575492a780cc7bad4335120542d697 (diff)
downloadtalos-obmc-uboot-f031f501efa898ad1eac641cb27079dd6ded306a.tar.gz
talos-obmc-uboot-f031f501efa898ad1eac641cb27079dd6ded306a.zip
rpi: BCM2837 and Raspberry Pi 3 32-bit support
The Raspberry Pi 3 contains a BCM2837 SoC. The BCM2837 is a BCM2836 with the CPU complex swapped out for a quad-core ARMv8. This can operate in 32- or 64-bit mode. 32-bit mode is the current default selected by the VideoCore firmware on the Raspberry Pi 3. This patch adds a 32-bit port of U-Boot for the Raspberry Pi 3. >From U-Boot's perspective, the only delta between the RPi 2 and RPi 3 is a change in usage of the SoC UARTs. On all previous Pis, the PL011 was the only UART in use. The Raspberry Pi 3 adds a Bluetooth module which uses a UART to connect to the SoC. By default, the PL011 is used for this purpose since it has larger FIFOs than the other "mini" UART. However, this can be configured via the VideoCore firmware's config.txt file. This patch hard-codes use of the mini UART in the RPi 3 port. If your system uses the PL011 UART for the console even on the RPi 3, please use the RPi 2 U-Boot port instead. A future change might determine which UART to use at run-time, thus allowing the RPi 2 and RPi 3 (32-bit) ports to be squashed together. The mini UART has some limitations. One externally visible issue in the BCM2837 integration is that the UART divides the SoC's "core clock" to generate the baud rate. The core clock is typically variable, and under control of the VideoCore firmware for thermal management reasons. If the VC FW does modify the core clock rate, UART communication will be corrupted since the baud rate will vary from the expected value. This was not an issue for the PL011 UART, since it is fed by a fixed 3MHz clock. To work around this, the VideoCore firmware can be told not to modify the SoC core clock. However, the only way this can happen and be thermally safe is to limit the core clock to a low/minimum frequency. This leaves performance on the table for use-cases that don't care about a UART console. Consequently, use of the mini UART console must be explicitly requested by entering the following line into config.txt: enable_uart=1 A recent version of the VC firmware is required to ensure that the mini UART is fully and correctly initialized by the VC FW; at least firmware.git 046effa13ebc "firmware: arm_loader: emmc clock depends on core clock See: https://github.com/raspberrypi/firmware/issues/572". Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'include')
-rw-r--r--include/configs/rpi-common.h9
-rw-r--r--include/configs/rpi_3_32b.h15
2 files changed, 23 insertions, 1 deletions
diff --git a/include/configs/rpi-common.h b/include/configs/rpi-common.h
index 89aee0a85b..5904a3246d 100644
--- a/include/configs/rpi-common.h
+++ b/include/configs/rpi-common.h
@@ -1,5 +1,5 @@
/*
- * (C) Copyright 2012,2015 Stephen Warren
+ * (C) Copyright 2012-2016 Stephen Warren
*
* SPDX-License-Identifier: GPL-2.0
*/
@@ -24,6 +24,9 @@
* We don't define a machine type for bcm2709/bcm2836 since the RPi Foundation
* chose to use someone else's previously registered machine ID (3139, MX51_GGC)
* rather than obtaining a valid ID:-/
+ *
+ * For the bcm2837, hopefully a machine type is not needed, since everything
+ * is DT.
*/
#ifdef CONFIG_BCM2835
#define CONFIG_MACH_TYPE MACH_TYPE_BCM2708
@@ -94,7 +97,11 @@
#endif
/* Console UART */
+#ifdef CONFIG_BCM2837
+#define CONFIG_BCM283X_MU_SERIAL
+#else
#define CONFIG_PL01X_SERIAL
+#endif
#define CONFIG_CONS_INDEX 0
#define CONFIG_BAUDRATE 115200
diff --git a/include/configs/rpi_3_32b.h b/include/configs/rpi_3_32b.h
new file mode 100644
index 0000000000..c00379b9aa
--- /dev/null
+++ b/include/configs/rpi_3_32b.h
@@ -0,0 +1,15 @@
+/*
+ * (C) Copyright 2012-2016 Stephen Warren <swarren@wwwdotorg.org>
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#define CONFIG_SYS_CACHELINE_SIZE 64
+
+#include "rpi-common.h"
+
+#endif
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