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| author | Jon Loeliger <jdl@freescale.com> | 2008-02-20 14:22:26 -0600 |
|---|---|---|
| committer | Jon Loeliger <jdl@freescale.com> | 2008-02-20 14:45:09 -0600 |
| commit | a551cee99ad1d1da20fd23ad265de47448852f56 (patch) | |
| tree | a6c37f4d07078beacba1c2214af79ecfb19280f6 /include | |
| parent | cb06eb961bdffc8728b38c242473d802e83ab2b4 (diff) | |
| download | talos-obmc-uboot-a551cee99ad1d1da20fd23ad265de47448852f56.tar.gz talos-obmc-uboot-a551cee99ad1d1da20fd23ad265de47448852f56.zip | |
86xx: Fix GUR PCI config registers properly.
Back in commit 975a083a5ef785c414b35f9c5b8ae25b26b41524 where
I tried to "8610HPCD: Fix typos in two PCI setup registers", I
botched it due to not realizing that 8610 and 8641 had different
Global Utility Register defintions, one of which was like 85xx,
and the other wasn't. Correct this problem by introducing two
symbols, one for each 86xx SoC, but neither of which is named
anything like 85xx.
My bad. Lovely Wednesday with git bisect. You know.
Signed-off-by: Jon Loeliger <jdl@freescale.com>
Diffstat (limited to 'include')
| -rw-r--r-- | include/asm-ppc/immap_86xx.h | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/include/asm-ppc/immap_86xx.h b/include/asm-ppc/immap_86xx.h index 6143062e5b..7526061d5a 100644 --- a/include/asm-ppc/immap_86xx.h +++ b/include/asm-ppc/immap_86xx.h @@ -1256,10 +1256,16 @@ typedef struct ccsr_rio { typedef struct ccsr_gur { uint porpllsr; /* 0xe0000 - POR PLL ratio status register */ uint porbmsr; /* 0xe0004 - POR boot mode status register */ -#define MPC86xx_PORBMSR_HA 0x00060000 +#define MPC8610_PORBMSR_HA 0x00070000 +#define MPC8610_PORBMSR_HA_SHIFT 16 +#define MPC8641_PORBMSR_HA 0x00060000 +#define MPC8641_PORBMSR_HA_SHIFT 17 uint porimpscr; /* 0xe0008 - POR I/O impedance status and control register */ uint pordevsr; /* 0xe000c - POR I/O device status regsiter */ -#define MPC86xx_PORDEVSR_IO_SEL 0x000F0000 +#define MPC8610_PORDEVSR_IO_SEL 0x00380000 +#define MPC8610_PORDEVSR_IO_SEL_SHIFT 19 +#define MPC8641_PORDEVSR_IO_SEL 0x000F0000 +#define MPC8641_PORDEVSR_IO_SEL_SHIFT 16 #define MPC86xx_PORDEVSR_CORE1TE 0x00000080 /* ASMP (Core1 addr trans) */ uint pordbgmsr; /* 0xe0010 - POR debug mode status register */ char res1[12]; |
