summaryrefslogtreecommitdiffstats
path: root/include
diff options
context:
space:
mode:
authorwdenk <wdenk>2004-01-29 09:22:58 +0000
committerwdenk <wdenk>2004-01-29 09:22:58 +0000
commit6876609446980c3055bbd32c195a63330e21d8e6 (patch)
treeb01a5dcb24de0cc0a020b142986eb64287f39422 /include
parentc178d3da6f1ac765cd880530a0672540b415a01c (diff)
downloadtalos-obmc-uboot-6876609446980c3055bbd32c195a63330e21d8e6.tar.gz
talos-obmc-uboot-6876609446980c3055bbd32c195a63330e21d8e6.zip
* Implement adaptive SDRAM timing configuration based on actual CPU
clock frequency for INCA-IP; fix problem with board hanging when switching from 150MHz to 100MHz * Add PCMCIA CS support for BMS2003 board
Diffstat (limited to 'include')
-rw-r--r--include/configs/TQM866M.h8
-rw-r--r--include/configs/bms2003.h1
2 files changed, 4 insertions, 5 deletions
diff --git a/include/configs/TQM866M.h b/include/configs/TQM866M.h
index 31f6d735a5..a5a759f2d7 100644
--- a/include/configs/TQM866M.h
+++ b/include/configs/TQM866M.h
@@ -36,16 +36,14 @@
#define CONFIG_MPC866 1 /* This is a MPC866 CPU */
#define CONFIG_TQM866M 1 /* ...on a TQM8xxM module */
-#define CFG_866_OSCCLK 10000000 /* 10 MHz - PLL input clock */
-#define CFG_866_CPUCLK_MIN 40000000 /* 40 MHz - CPU minimum clock */
+#define CFG_866_OSCCLK 10000000 /* 10 MHz - PLL input clock */
+#define CFG_866_CPUCLK_MIN 10000000 /* 10 MHz - CPU minimum clock */
#define CFG_866_CPUCLK_MAX 133000000 /* 133 MHz - CPU maximum clock */
-#define CFG_866_CPUCLK_DEFAULT 100000000 /* 100 MHz - CPU default clock */
+#define CFG_866_CPUCLK_DEFAULT 50000000 /* 50 MHz - CPU default clock */
/* (it will be used if there is no */
/* 'cpuclk' variable with valid value) */
#define CONFIG_8xx_CONS_SMC1 1 /* Console is on SMC1 */
-#undef CONFIG_8xx_CONS_SMC2
-#undef CONFIG_8xx_CONS_NONE
#define CONFIG_BAUDRATE 115200 /* console baudrate = 115kbps */
diff --git a/include/configs/bms2003.h b/include/configs/bms2003.h
index 18170d4438..8a76a286e0 100644
--- a/include/configs/bms2003.h
+++ b/include/configs/bms2003.h
@@ -346,6 +346,7 @@
#define CFG_PCMCIA_ATTRB_SIZE ( 64 << 20 )
#define CFG_PCMCIA_IO_ADDR (0xEC100000)
#define CFG_PCMCIA_IO_SIZE ( 64 << 20 )
+#define PCMCIA_MEM_WIN_NO 5
#define NSCU_OE_INV 1 /* PCMCIA_GCRX_CXOE is inverted */
#endif
OpenPOWER on IntegriCloud