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authorAnatolij Gustschin <agust@denx.de>2013-02-08 00:03:44 +0000
committerWolfgang Denk <wd@denx.de>2013-03-09 08:21:46 +0100
commit676c66918a41f32b768abe1cb9fcb5f475682935 (patch)
treea4dfee66e0e8fe9e0774caa251fc63aa2812f28a /include
parentb84d6d27fc32cb0a069b861147d182655e22c302 (diff)
downloadtalos-obmc-uboot-676c66918a41f32b768abe1cb9fcb5f475682935.tar.gz
talos-obmc-uboot-676c66918a41f32b768abe1cb9fcb5f475682935.zip
mpc512x: use common code for CSx configuration
Remove CSx configurations from board code and only define required CSx macros in the board config file to configure chip select windows and parameters. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Reinhard Arlt <reinhard.arlt@esd-electronics.com> Cc: Wolfgang Denk <wd@denx.de>
Diffstat (limited to 'include')
-rw-r--r--include/configs/aria.h5
-rw-r--r--include/configs/mecp5123.h7
-rw-r--r--include/configs/mpc5121ads.h2
-rw-r--r--include/configs/pdm360ng.h6
4 files changed, 20 insertions, 0 deletions
diff --git a/include/configs/aria.h b/include/configs/aria.h
index 0b31c50daf..6b6e400b55 100644
--- a/include/configs/aria.h
+++ b/include/configs/aria.h
@@ -266,11 +266,16 @@
#define CONFIG_SYS_ARIA_SRAM_BASE (CONFIG_SYS_SRAM_BASE + \
CONFIG_SYS_SRAM_SIZE)
#define CONFIG_SYS_ARIA_SRAM_SIZE 0x00100000 /* reserve 1MB-window */
+#define CONFIG_SYS_CS6_START CONFIG_SYS_ARIA_SRAM_BASE
+#define CONFIG_SYS_CS6_SIZE CONFIG_SYS_ARIA_SRAM_SIZE
#define CONFIG_SYS_ARIA_FPGA_BASE (CONFIG_SYS_ARIA_SRAM_BASE + \
CONFIG_SYS_ARIA_SRAM_SIZE)
#define CONFIG_SYS_ARIA_FPGA_SIZE 0x20000 /* 128 KB */
+#define CONFIG_SYS_CS2_START CONFIG_SYS_ARIA_FPGA_BASE
+#define CONFIG_SYS_CS2_SIZE CONFIG_SYS_ARIA_FPGA_SIZE
+
#define CONFIG_SYS_CS0_CFG 0x05059150
#define CONFIG_SYS_CS2_CFG ( (5 << 24) | \
(5 << 16) | \
diff --git a/include/configs/mecp5123.h b/include/configs/mecp5123.h
index cafc273c8c..1e09ff2230 100644
--- a/include/configs/mecp5123.h
+++ b/include/configs/mecp5123.h
@@ -191,6 +191,10 @@
#define CONFIG_SYS_SRAM_BASE 0x30000000
#define CONFIG_SYS_SRAM_SIZE 0x00020000 /* 128 KB */
+/* Initialize Local Window for NOR FLASH access */
+#define CONFIG_SYS_CS0_START CONFIG_SYS_FLASH_BASE
+#define CONFIG_SYS_CS0_SIZE CONFIG_SYS_FLASH_SIZE
+
/* ALE active low, data size 4bytes */
#define CONFIG_SYS_CS0_CFG 0x05051150
@@ -201,6 +205,9 @@
#define CONFIG_SYS_CS1_CFG 0x1f1f3090
#define CONFIG_SYS_VPC3_BASE 0x82000000 /* start of VPC3 space */
#define CONFIG_SYS_VPC3_SIZE 0x00010000 /* max VPC3 size */
+/* Initialize Local Window for VPC3 access */
+#define CONFIG_SYS_CS1_START CONFIG_SYS_VPC3_BASE
+#define CONFIG_SYS_CS1_SIZE CONFIG_SYS_VPC3_SIZE
/* Use SRAM for initial stack */
#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_SRAM_BASE /* Init RAM addr */
diff --git a/include/configs/mpc5121ads.h b/include/configs/mpc5121ads.h
index 3f55d354ef..a64df61fe5 100644
--- a/include/configs/mpc5121ads.h
+++ b/include/configs/mpc5121ads.h
@@ -258,6 +258,8 @@
*/
#define CONFIG_SYS_CPLD_BASE 0x82000000
#define CONFIG_SYS_CPLD_SIZE 0x00010000 /* 64 KB */
+#define CONFIG_SYS_CS2_START CONFIG_SYS_CPLD_BASE
+#define CONFIG_SYS_CS2_SIZE CONFIG_SYS_CPLD_SIZE
#define CONFIG_SYS_SRAM_BASE 0x30000000
#define CONFIG_SYS_SRAM_SIZE 0x00020000 /* 128 KB */
diff --git a/include/configs/pdm360ng.h b/include/configs/pdm360ng.h
index 671e9eb1e5..07731217bc 100644
--- a/include/configs/pdm360ng.h
+++ b/include/configs/pdm360ng.h
@@ -206,6 +206,9 @@
#define CONFIG_SYS_SRAM_BASE 0x50000000
#define CONFIG_SYS_SRAM_SIZE 0x00020000 /* 128 KB */
+#define CONFIG_SYS_CS1_START CONFIG_SYS_FLASH1_BASE
+#define CONFIG_SYS_CS1_SIZE CONFIG_SYS_FLASH_SIZE
+
/* ALE active low, data size 4 bytes */
#define CONFIG_SYS_CS0_CFG 0x05059350
/* ALE active low, data size 4 bytes */
@@ -213,6 +216,9 @@
#define CONFIG_SYS_MRAM_BASE 0x50040000
#define CONFIG_SYS_MRAM_SIZE 0x00020000
+#define CONFIG_SYS_CS2_START CONFIG_SYS_MRAM_BASE
+#define CONFIG_SYS_CS2_SIZE CONFIG_SYS_MRAM_SIZE
+
/* ALE active low, data size 4 bytes */
#define CONFIG_SYS_CS2_CFG 0x05059110
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