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| author | Thomas Chou <thomas@wytron.com.tw> | 2014-08-25 17:09:07 +0800 |
|---|---|---|
| committer | Thomas Chou <thomas@wytron.com.tw> | 2014-08-30 17:48:43 +0800 |
| commit | 57cfeb5140642b1071b01a7cc5c34d4ef3166180 (patch) | |
| tree | 4947572a662637ff402427d106d57144f29e5988 /include | |
| parent | 8645071006a0b577ae4660f4a271f42c081ef4ab (diff) | |
| download | talos-obmc-uboot-57cfeb5140642b1071b01a7cc5c34d4ef3166180.tar.gz talos-obmc-uboot-57cfeb5140642b1071b01a7cc5c34d4ef3166180.zip | |
nios2: move nios2.h to arch asm directory
The nios2.h is nios2 cpu specific, and should go arch asm
directory.
Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
Diffstat (limited to 'include')
| -rw-r--r-- | include/nios2.h | 40 |
1 files changed, 0 insertions, 40 deletions
diff --git a/include/nios2.h b/include/nios2.h deleted file mode 100644 index 0539ec3450..0000000000 --- a/include/nios2.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * (C) Copyright 2004, Psyent Corporation <www.psyent.com> - * Scott McNutt <smcnutt@psyent.com> - * - * SPDX-License-Identifier: GPL-2.0+ - */ - -#ifndef __NIOS2_H__ -#define __NIOS2_H__ - -/*------------------------------------------------------------------------ - * Control registers -- use with wrctl() & rdctl() - *----------------------------------------------------------------------*/ -#define CTL_STATUS 0 /* Processor status reg */ -#define CTL_ESTATUS 1 /* Exception status reg */ -#define CTL_BSTATUS 2 /* Break status reg */ -#define CTL_IENABLE 3 /* Interrut enable reg */ -#define CTL_IPENDING 4 /* Interrut pending reg */ - -/*------------------------------------------------------------------------ - * Access to control regs - *----------------------------------------------------------------------*/ - -#define rdctl(reg) __builtin_rdctl(reg) -#define wrctl(reg, val) __builtin_wrctl(reg, val) - -/*------------------------------------------------------------------------ - * Control reg bit masks - *----------------------------------------------------------------------*/ -#define STATUS_IE (1<<0) /* Interrupt enable */ -#define STATUS_U (1<<1) /* User-mode */ - -/*------------------------------------------------------------------------ - * Bit-31 Cache bypass -- only valid for data access. When data cache - * is not implemented, bit 31 is ignored for compatibility. - *----------------------------------------------------------------------*/ -#define CACHE_BYPASS(a) ((a) | 0x80000000) -#define CACHE_NO_BYPASS(a) ((a) & ~0x80000000) - -#endif /* __NIOS2_H__ */ |
