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authorLinus Walleij <linus.walleij@linaro.org>2015-02-19 17:19:37 +0100
committerTom Rini <trini@konsulko.com>2015-03-05 20:50:26 -0500
commit14f264e6fdce3cccae4e3816252b7a8bb3c7dd9f (patch)
tree601042c4f3c0e04eff34f3697c3a6e680de91ea9 /include
parent950cb9bbc7fa6fa129a675c39b99e7cd9d63595c (diff)
downloadtalos-obmc-uboot-14f264e6fdce3cccae4e3816252b7a8bb3c7dd9f.tar.gz
talos-obmc-uboot-14f264e6fdce3cccae4e3816252b7a8bb3c7dd9f.zip
vexpress64: juno: add NOR flash detection
This enables the vexpress64 to detect its NOR flash so that we can load kernel etc from it. Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'include')
-rw-r--r--include/configs/vexpress_aemv8a.h34
1 files changed, 23 insertions, 11 deletions
diff --git a/include/configs/vexpress_aemv8a.h b/include/configs/vexpress_aemv8a.h
index cfe3f2f7af..e6cd8819dd 100644
--- a/include/configs/vexpress_aemv8a.h
+++ b/include/configs/vexpress_aemv8a.h
@@ -29,8 +29,6 @@
/*#define CONFIG_ARMV8_SWITCH_TO_EL1*/
-#define CONFIG_SYS_NO_FLASH
-
#define CONFIG_SUPPORT_RAW_INITRD
/* Cache Definitions */
@@ -56,7 +54,6 @@
/* Flat Device Tree Definitions */
#define CONFIG_OF_LIBFDT
-
/* SMP Spin Table Definitions */
#ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
#define CPU_RELEASE_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
@@ -79,13 +76,6 @@
#define V2M_BASE 0x80000000
-/*
- * Physical addresses, offset from V2M_PA_CS0-3
- */
-#define V2M_NOR0 (V2M_PA_CS0)
-#define V2M_NOR1 (V2M_PA_CS4)
-#define V2M_SRAM (V2M_PA_CS1)
-
/* Common peripherals relative to CS7. */
#define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
#define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
@@ -183,7 +173,6 @@
#define CONFIG_CMD_DHCP
#define CONFIG_CMD_PXE
#define CONFIG_CMD_ENV
-#define CONFIG_CMD_FLASH
#define CONFIG_CMD_IMI
#define CONFIG_CMD_LOADB
#define CONFIG_CMD_MEMORY
@@ -266,4 +255,27 @@
#define CONFIG_CMDLINE_EDITING
#define CONFIG_SYS_MAXARGS 64 /* max command args */
+/* Flash memory is available on the Juno board only */
+#ifndef CONFIG_TARGET_VEXPRESS64_JUNO
+#define CONFIG_SYS_NO_FLASH
+#else
+#define CONFIG_CMD_FLASH
+#define CONFIG_SYS_FLASH_CFI 1
+#define CONFIG_FLASH_CFI_DRIVER 1
+#define CONFIG_SYS_FLASH_BASE 0x08000000
+#define CONFIG_SYS_FLASH_SIZE 0x04000000 /* 64 MiB */
+#define CONFIG_SYS_MAX_FLASH_BANKS 2
+
+/* Timeout values in ticks */
+#define CONFIG_SYS_FLASH_ERASE_TOUT (2 * CONFIG_SYS_HZ) /* Erase Timeout */
+#define CONFIG_SYS_FLASH_WRITE_TOUT (2 * CONFIG_SYS_HZ) /* Write Timeout */
+
+/* 255 0x40000 sectors + first or last sector may have 4 erase regions = 259 */
+#define CONFIG_SYS_MAX_FLASH_SECT 259 /* Max sectors */
+#define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */
+#define CONFIG_SYS_FLASH_PROTECTION /* The devices have real protection */
+#define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
+
+#endif
+
#endif /* __VEXPRESS_AEMV8A_H */
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