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authorKumar Gala <galak@kernel.crashing.org>2008-07-14 14:07:02 -0500
committerAndrew Fleming-AFLEMING <afleming@freescale.com>2008-07-14 20:19:59 -0500
commit7f9f4347cf325c63a39fe30910f3fb211ae2cc15 (patch)
treefa1cf8a170572b65af737680b1000d0324099c60 /include/fdt.h
parente5852787f0c3c442a276262f13d91ca450605ac0 (diff)
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85xx: Add some L1/L2 SPR register definitions
Add new L1/L2 SPRs related to e500mc cache config and control. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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