powerpc/p3060qds: Add board related support for P3060QDS platform

The P3060QDS is a Freescale reference board for the six-core P3060 SOC.

P3060QDS Board Overview:
 Memory subsystem:
  - 2G Bytes unbuffered DDR3 SDRAM SO-DIMM(64bit bus)
  - 128M Bytes NOR flash single-chip memory
  - 16M Bytes SPI flash
  - 8K Bytes AT24C64 I2C EEPROM for RCW
 Ethernet:
  - Eight Ethernet controllers (4x1G + 4x1G/2.5G)
  - Three VSC8641 PHYs on board (2xRGMII + 1xMII)
  - Suport multiple Vitesse VSC8234 SGMII Cards in Slot1/2/3
 PCIe: Two PCI Express 2.0 controllers/ports
 USB:  Two USB2.0, USB1(TYPE-A) and USB2(TYPE-AB) on board
 I2C:  Four I2C controllers
 UART: Supports two dUARTs up to 115200 bps for console
 RapidIO:  Two RapidIO, sRIO1 and sRIO2

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>

2 files changed, 53 insertions, 1 deletions

diff --git a/include/configs/P3060QDS.h b/include/configs/P3060QDS.h
new file mode 100644
index 0000000000..8006547000
--- /dev/null
+++ b/include/configs/P3060QDS.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright 2011 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * P3060 QDS board configuration file
+ */
+#define CONFIG_P3060QDS
+#define CONFIG_PHYS_64BIT
+#define CONFIG_PPC_P3060
+#define CONFIG_FSL_QIXIS
+
+#define CONFIG_NAND_FSL_ELBC
+
+#define CONFIG_ICS307_REFCLK_HZ	25000000  /* ICS307 ref clk freq */
+
+#define CONFIG_SPI_FLASH_ATMEL
+#define CONFIG_SPI_FLASH_EON
+#define CONFIG_SPI_FLASH_SST
+
+#include "corenet_ds.h"
+
+#define SGMII_CARD_PORT1_PHY_ADDR 0x1C
+#define SGMII_CARD_PORT2_PHY_ADDR 0x1D
+#define SGMII_CARD_PORT3_PHY_ADDR 0x1E
+#define SGMII_CARD_PORT4_PHY_ADDR 0x1F
+
+/* There is a PCA9547 8-channel I2C-bus multiplexer on P3060QDS board */
+#define CONFIG_I2C_MUX
+#define CONFIG_I2C_MULTI_BUS
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index 0622b9fcfd..7925b95838 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -168,7 +168,11 @@
 #define CONFIG_DDR_SPD
 #define CONFIG_FSL_DDR3
 
+#ifdef CONFIG_P3060QDS
+#define CONFIG_SYS_SPD_BUS_NUM	0
+#else
 #define CONFIG_SYS_SPD_BUS_NUM	1
+#endif
 #define SPD_EEPROM_ADDRESS1	0x51
 #define SPD_EEPROM_ADDRESS2	0x52
 #define SPD_EEPROM_ADDRESS	SPD_EEPROM_ADDRESS1	/* for p3041/p5010 */
@@ -641,7 +645,7 @@
 
 #define CONFIG_BAUDRATE	115200
 
-#if defined(CONFIG_P4080DS)
+#if defined(CONFIG_P4080DS) || defined(CONFIG_P3060QDS)
 #define __USB_PHY_TYPE	ulpi
 #else
 #define __USB_PHY_TYPE	utmi