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authorBhupesh Sharma <bhupesh.sharma@freescale.com>2015-03-19 09:20:43 -0700
committerYork Sun <yorksun@freescale.com>2015-04-21 10:26:29 -0700
commit422cb08acb1bc9a05ffa68ba68b4e196dad1af5b (patch)
tree1aae2fc085d1317f5ee6b9e26f44fffa5435be36 /include/configs
parent1fb5ff9ae732d63c8810bd1a6922273e14329093 (diff)
downloadtalos-obmc-uboot-422cb08acb1bc9a05ffa68ba68b4e196dad1af5b.tar.gz
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armv8/fsl-lsch3: Add Freescale Debug Server driver
The Debug Server driver is responsible for loading the Debug server FW on the Service Processor (Cortex-A5 core) on LS2085A like SoCs and then polling for the successful initialization of the same. TOP MEM HIDE is adjusted to ensure the space required by Debug Server FW is accounted for. MC uses the DDR area which is calculated as: MC DDR region start = Top of DDR - area reserved by Debug Server FW Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/ls2085a_common.h20
1 files changed, 15 insertions, 5 deletions
diff --git a/include/configs/ls2085a_common.h b/include/configs/ls2085a_common.h
index e0435cc0a7..94d372f791 100644
--- a/include/configs/ls2085a_common.h
+++ b/include/configs/ls2085a_common.h
@@ -19,6 +19,9 @@
#define CONFIG_ARM_ERRATA_828024
#define CONFIG_ARM_ERRATA_826974
+/* We need architecture specific misc initializations */
+#define CONFIG_ARCH_MISC_INIT
+
/* Link Definitions */
#define CONFIG_SYS_TEXT_BASE 0x30001000
@@ -205,6 +208,14 @@
#define CONFIG_SYS_CS0_FTIM2 CONFIG_SYS_NOR_FTIM2
#define CONFIG_SYS_CS0_FTIM3 CONFIG_SYS_NOR_FTIM3
+/* Debug Server firmware */
+#define CONFIG_FSL_DEBUG_SERVER
+#define CONFIG_SYS_DEBUG_SERVER_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024)
+#define CONFIG_SYS_DEBUG_SERVER_FW_IN_NOR
+#define CONFIG_SYS_DEBUG_SERVER_FW_ADDR 0x580C00000ULL
+/* 2 sec timeout */
+#define CONFIG_SYS_DEBUG_SERVER_TIMEOUT (2 * 1000 * 1000)
+
/* MC firmware */
#define CONFIG_FSL_MC_ENET
#define CONFIG_SYS_LS_MC_DRAM_BLOCK_MIN_SIZE (512UL * 1024 * 1024)
@@ -216,9 +227,9 @@
#define CONFIG_SYS_LS_MC_DPL_MAX_LENGTH (256 * 1024)
#define CONFIG_SYS_LS_MC_DRAM_DPL_OFFSET 0xe00000
-/* Carve the MC private DRAM block from the end of DRAM */
-#ifdef CONFIG_FSL_MC_ENET
-#define CONFIG_SYS_MEM_TOP_HIDE mc_get_dram_block_size()
+/* Carve out a DDR region which will not be used by u-boot/Linux */
+#if defined(CONFIG_FSL_MC_ENET) || defined(CONFIG_FSL_DEBUG_SERVER)
+#define CONFIG_SYS_MEM_TOP_HIDE get_dram_size_to_hide()
#endif
/* Command line configuration */
@@ -250,7 +261,6 @@
#define CONFIG_SYS_CLK_FREQ 100000000
#define CONFIG_DDR_CLK_FREQ 133333333
-
#define CONFIG_NR_DRAM_BANKS 3
#define CONFIG_HWCONFIG
@@ -297,7 +307,7 @@
#define CONFIG_SYS_MAXARGS 64 /* max command args */
#ifndef __ASSEMBLY__
-unsigned long mc_get_dram_block_size(void);
+unsigned long get_dram_size_to_hide(void);
#endif
#endif /* __LS2_COMMON_H */
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