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| author | Joe Hershberger <joe.hershberger@ni.com> | 2011-10-11 23:57:30 -0500 |
|---|---|---|
| committer | Kim Phillips <kim.phillips@freescale.com> | 2011-11-03 18:27:56 -0500 |
| commit | 7d6a098219f8473ca4653cce5f7a49672b967f36 (patch) | |
| tree | 82ad07513347a36c90f81ce50dbad8a5ca8c229e /include/configs/ve8313.h | |
| parent | 2fef402097866b4172d7a966a72397a5ccba5b10 (diff) | |
| download | talos-obmc-uboot-7d6a098219f8473ca4653cce5f7a49672b967f36.tar.gz talos-obmc-uboot-7d6a098219f8473ca4653cce5f7a49672b967f36.zip | |
mpc83xx: Cleanup usage of LBC constants
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'include/configs/ve8313.h')
| -rw-r--r-- | include/configs/ve8313.h | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/include/configs/ve8313.h b/include/configs/ve8313.h index 69f29c7263..1d458898a8 100644 --- a/include/configs/ve8313.h +++ b/include/configs/ve8313.h @@ -146,18 +146,19 @@ #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* buffer up multiple bytes */ #define CONFIG_SYS_NOR_BR_PRELIM (CONFIG_SYS_FLASH_BASE \ - | (2 << BR_PS_SHIFT) /* 16 bit */ \ - | BR_V) /* valid */ + | BR_PS_16 /* 16 bit */ \ + | BR_MS_GPCM /* MSEL = GPCM */ \ + | BR_V) /* valid */ #define CONFIG_SYS_NOR_OR_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \ | OR_GPCM_CSNT \ | OR_GPCM_ACS_DIV4 \ | OR_GPCM_SCY_5 \ - | OR_GPCM_TRLX \ + | OR_GPCM_TRLX_SET \ | OR_GPCM_EAD) /* 0xfe000c55 */ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_LBLAWAR0_PRELIM 0x80000018 /* 32 MB window size */ +#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_32MB) #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_SECT 256 /* sectors per dev */ @@ -209,7 +210,7 @@ | BR_MS_FCM \ | BR_V) /* valid */ /* 0x61000c21 */ -#define CONFIG_SYS_NAND_OR_PRELIM (0xffff8000 \ +#define CONFIG_SYS_NAND_OR_PRELIM (OR_AM_32KB \ | OR_FCM_BCTLD \ | OR_FCM_CHT \ | OR_FCM_SCY_2 \ @@ -223,7 +224,7 @@ #define CONFIG_SYS_OR1_PRELIM CONFIG_SYS_NAND_OR_PRELIM #define CONFIG_SYS_LBLAWBAR1_PRELIM CONFIG_SYS_NAND_BASE -#define CONFIG_SYS_LBLAWAR1_PRELIM 0x8000000E /* 32KB */ +#define CONFIG_SYS_LBLAWAR1_PRELIM (LBLAWAR_EN | LBLAWAR_32KB) #define CONFIG_SYS_NAND_LBLAWBAR_PRELIM CONFIG_SYS_LBLAWBAR1_PRELIM #define CONFIG_SYS_NAND_LBLAWAR_PRELIM CONFIG_SYS_LBLAWAR1_PRELIM @@ -233,12 +234,12 @@ | BR_PS_8 \ | BR_V) /* 0x60000801 */ -#define CONFIG_SYS_OR2_PRELIM (0xfffe0000 \ +#define CONFIG_SYS_OR2_PRELIM (OR_AM_128KB \ | OR_GPCM_CSNT \ | OR_GPCM_XACS \ | OR_GPCM_SCY_3 \ - | OR_GPCM_TRLX \ - | OR_GPCM_EHTR \ + | OR_GPCM_TRLX_SET \ + | OR_GPCM_EHTR_SET \ | OR_GPCM_EAD) /* 0xfffe0937 */ /* local bus read write buffer mapping SRAM@0x64000000 */ @@ -247,12 +248,12 @@ | BR_V) /* 0x62001001 */ -#define CONFIG_SYS_OR3_PRELIM (0xfe000000 \ +#define CONFIG_SYS_OR3_PRELIM (OR_AM_32MB \ | OR_GPCM_CSNT \ | OR_GPCM_XACS \ | OR_GPCM_SCY_15 \ - | OR_GPCM_TRLX \ - | OR_GPCM_EHTR \ + | OR_GPCM_TRLX_SET \ + | OR_GPCM_EHTR_SET \ | OR_GPCM_EAD) /* 0xfe0009f7 */ |
