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| author | Tom Rini <trini@ti.com> | 2013-02-18 09:57:06 -0500 |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-02-18 09:57:06 -0500 |
| commit | 1671ba7c0d5dd59c84cb3ae5dc586242d65cbf5f (patch) | |
| tree | 65493c2c97adc37be6a60fc0a2fb81d214257fb1 /include/configs/suvd3.h | |
| parent | ea6bd08b7717bf0d3f69ad9f016bf3b03b3eaf16 (diff) | |
| parent | 411190cb16b63e39345a608b68b3d1be5168117a (diff) | |
| download | talos-obmc-uboot-1671ba7c0d5dd59c84cb3ae5dc586242d65cbf5f.tar.gz talos-obmc-uboot-1671ba7c0d5dd59c84cb3ae5dc586242d65cbf5f.zip | |
Merge branch 'master' of git://git.denx.de/u-boot-mpc83xx
Diffstat (limited to 'include/configs/suvd3.h')
| -rw-r--r-- | include/configs/suvd3.h | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/include/configs/suvd3.h b/include/configs/suvd3.h index c50832c1e0..bbf9da545b 100644 --- a/include/configs/suvd3.h +++ b/include/configs/suvd3.h @@ -110,4 +110,41 @@ BATL_CACHEINHIBIT | BATL_GUARDEDSTORAGE) #define CONFIG_SYS_DBAT6U CONFIG_SYS_IBAT6U +/* + * QE UEC ethernet configuration + */ +#if defined(CONFIG_KMVECT1) +#define CONFIG_MV88E6352_SWITCH +#define CONFIG_KM_MVEXTSW_ADDR 0x10 + +/* ethernet port connected to simple switch 88e6122 (UEC0) */ +#define CONFIG_UEC_ETH1 +#define CONFIG_SYS_UEC1_UCC_NUM 0 /* UCC1 */ +#define CONFIG_SYS_UEC1_RX_CLK QE_CLK9 +#define CONFIG_SYS_UEC1_TX_CLK QE_CLK10 + +#define CONFIG_FIXED_PHY 0xFFFFFFFF +#define CONFIG_SYS_FIXED_PHY_ADDR 0x1E /* unused address */ +#define CONFIG_SYS_FIXED_PHY_PORT(devnum, speed, duplex) \ + {devnum, speed, duplex} +#define CONFIG_SYS_FIXED_PHY_PORTS \ + CONFIG_SYS_FIXED_PHY_PORT("UEC0", SPEED_100, DUPLEX_FULL) + +#define CONFIG_SYS_UEC1_ETH_TYPE FAST_ETH +#define CONFIG_SYS_UEC1_PHY_ADDR CONFIG_SYS_FIXED_PHY_ADDR +#define CONFIG_SYS_UEC1_INTERFACE_TYPE PHY_INTERFACE_MODE_MII +#define CONFIG_SYS_UEC1_INTERFACE_SPEED 100 + +/* ethernet port connected to piggy (UEC2) */ +#define CONFIG_HAS_ETH1 +#define CONFIG_UEC_ETH2 +#define CONFIG_SYS_UEC2_UCC_NUM 2 /* UCC3 */ +#define CONFIG_SYS_UEC2_RX_CLK QE_CLK_NONE /* not used in RMII Mode */ +#define CONFIG_SYS_UEC2_TX_CLK QE_CLK12 +#define CONFIG_SYS_UEC2_ETH_TYPE FAST_ETH +#define CONFIG_SYS_UEC2_PHY_ADDR 0 +#define CONFIG_SYS_UEC2_INTERFACE_TYPE PHY_INTERFACE_MODE_RMII +#define CONFIG_SYS_UEC2_INTERFACE_SPEED 100 +#endif /* CONFIG_KMVECT1 */ + #endif /* __CONFIG_H */ |
