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| author | Marek Vasut <marex@denx.de> | 2014-10-16 12:25:40 +0200 |
|---|---|---|
| committer | Marek Vasut <marex@denx.de> | 2014-10-27 02:26:24 +0100 |
| commit | 34584d190db5cfc879dea71ba345d15fe8bf348b (patch) | |
| tree | 185d3cd57e347ab0c5b1eba45d9a8db2d73befae /include/configs/socfpga_common.h | |
| parent | fc520894d426aae5dc0b87aa012520fc18231e1e (diff) | |
| download | talos-obmc-uboot-34584d190db5cfc879dea71ba345d15fe8bf348b.tar.gz talos-obmc-uboot-34584d190db5cfc879dea71ba345d15fe8bf348b.zip | |
arm: socfpga: Zap spl.h and ad-hoc related syms
Switch to the common spl.h file and zap the arch/spl.h . Since the arch/spl.h
contained various ad-hoc symbols, zap those symbols as well and rework the
board configuration a little so it doesn't depend on them.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Chin Liang See <clsee@altera.com>
Cc: Dinh Nguyen <dinguyen@altera.com>
Cc: Vince Bridgers <vbridger@altera.com>
Cc: Albert Aribaud <albert.u.boot@aribaud.net>
Acked-by: Pavel Machek <pavel@denx.de>
Diffstat (limited to 'include/configs/socfpga_common.h')
| -rw-r--r-- | include/configs/socfpga_common.h | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 69527985e2..ef3572b73b 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -167,16 +167,21 @@ /* * SPL + * + * SRAM Memory layout: + * + * 0xFFFF_0000 ...... Start of SRAM + * 0xFFFF_xxxx ...... Top of stack (grows down) + * 0xFFFF_yyyy ...... Malloc area + * 0xFFFF_zzzz ...... Global Data + * 0xFFFF_FF00 ...... End of SRAM */ #define CONFIG_SPL_FRAMEWORK #define CONFIG_SPL_BOARD_INIT #define CONFIG_SPL_RAM_DEVICE -#define CONFIG_SPL_TEXT_BASE 0xFFFF0000 -#define CONFIG_SPL_STACK CONFIG_SYS_INIT_SP_ADDR -#define CONFIG_SPL_STACK_SIZE (4 * 1024) -#define CONFIG_SPL_MALLOC_SIZE (5 * 1024) /* FIXME */ -#define CONFIG_SYS_SPL_MALLOC_START ((unsigned long) (&__malloc_start)) -#define CONFIG_SYS_SPL_MALLOC_SIZE (&__malloc_end - &__malloc_start) +#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_INIT_RAM_ADDR +#define CONFIG_SYS_SPL_MALLOC_START CONFIG_SYS_INIT_SP_ADDR +#define CONFIG_SYS_SPL_MALLOC_SIZE (5 * 1024) #define CHUNKSZ_CRC32 (1 * 1024) /* FIXME: ewww */ #define CONFIG_CRC32_VERIFY |
