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| author | Stefan Roese <sr@denx.de> | 2007-10-31 17:57:52 +0100 |
|---|---|---|
| committer | Stefan Roese <sr@denx.de> | 2007-10-31 21:21:47 +0100 |
| commit | d25dfe08fbd1220cb994e7e6b105049aa9aa8e79 (patch) | |
| tree | b3fe3e942a36d0e6f668194e6cf911a4b436fca8 /include/configs/sequoia.h | |
| parent | 9b94ac61d2176185c30adf0793e079ec30e68687 (diff) | |
| download | talos-obmc-uboot-d25dfe08fbd1220cb994e7e6b105049aa9aa8e79.tar.gz talos-obmc-uboot-d25dfe08fbd1220cb994e7e6b105049aa9aa8e79.zip | |
ppc4xx: Remove cache definition from 4xx board config files
All 4xx board config files don't need the cache definitions anymore.
These are now defined in common headers.
Signed-off-by: Stefan Roese <sr@denx.de>
Diffstat (limited to 'include/configs/sequoia.h')
| -rw-r--r-- | include/configs/sequoia.h | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/include/configs/sequoia.h b/include/configs/sequoia.h index 600f98cf0d..72f01d90fd 100644 --- a/include/configs/sequoia.h +++ b/include/configs/sequoia.h @@ -43,6 +43,14 @@ #define CONFIG_SYS_CLK_FREQ ((in8(CFG_BCSR_BASE + 3) & 0x80) ? \ 33333333 : 33000000) +#if 0 +/* + * 44x dcache supported is working now on sequoia, but we don't enable + * it yet since it needs further testing + */ +#define CONFIG_4xx_DCACHE /* enable dcache */ +#endif + #define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */ #define CONFIG_MISC_INIT_R 1 /* Call misc_init_r */ @@ -460,15 +468,6 @@ #define CFG_NAND_BASE (CFG_NAND_ADDR + CFG_NAND_CS) #define CFG_NAND_SELECT_DEVICE 1 /* nand driver supports mutipl. chips */ -/*----------------------------------------------------------------------- - * Cache Configuration - *----------------------------------------------------------------------*/ -#define CFG_DCACHE_SIZE (32<<10) /* For AMCC 440 CPUs */ -#define CFG_CACHELINE_SIZE 32 /* ... */ -#if defined(CONFIG_CMD_KGDB) -#define CFG_CACHELINE_SHIFT 5 /* log base 2 of the above value */ -#endif - /* * Internal Definitions * |
