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| author | Joe Hershberger <joe.hershberger@ni.com> | 2011-10-11 23:57:30 -0500 |
|---|---|---|
| committer | Kim Phillips <kim.phillips@freescale.com> | 2011-11-03 18:27:56 -0500 |
| commit | 7d6a098219f8473ca4653cce5f7a49672b967f36 (patch) | |
| tree | 82ad07513347a36c90f81ce50dbad8a5ca8c229e /include/configs/sbc8349.h | |
| parent | 2fef402097866b4172d7a966a72397a5ccba5b10 (diff) | |
| download | talos-obmc-uboot-7d6a098219f8473ca4653cce5f7a49672b967f36.tar.gz talos-obmc-uboot-7d6a098219f8473ca4653cce5f7a49672b967f36.zip | |
mpc83xx: Cleanup usage of LBC constants
Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Diffstat (limited to 'include/configs/sbc8349.h')
| -rw-r--r-- | include/configs/sbc8349.h | 55 |
1 files changed, 37 insertions, 18 deletions
diff --git a/include/configs/sbc8349.h b/include/configs/sbc8349.h index 99f8fb75d3..4812f686d5 100644 --- a/include/configs/sbc8349.h +++ b/include/configs/sbc8349.h @@ -136,8 +136,8 @@ /* * SDRAM on the Local Bus */ -#define CONFIG_SYS_LBC_SDRAM_BASE 0x10000000 /* Localbus SDRAM */ -#define CONFIG_SYS_LBC_SDRAM_SIZE 128 /* LBC SDRAM is 128MB */ +#define CONFIG_SYS_LBC_SDRAM_BASE 0xF0000000 /* Localbus SDRAM */ +#define CONFIG_SYS_LBC_SDRAM_SIZE 64 /* LBC SDRAM is 64MB */ /* * FLASH on the Local Bus @@ -148,14 +148,25 @@ #define CONFIG_SYS_FLASH_SIZE 8 /* flash size in MB */ /* #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE */ -#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \ - | (2 << BR_PS_SHIFT) /* 16 bit port */ \ - | BR_V) /* valid */ +#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE \ + | BR_PS_16 /* 16 bit port */ \ + | BR_MS_GPCM /* MSEL = GPCM */ \ + | BR_V) /* valid */ + +#define CONFIG_SYS_OR0_PRELIM (MEG_TO_AM(CONFIG_SYS_FLASH_SIZE) \ + | OR_GPCM_XAM \ + | OR_GPCM_CSNT \ + | OR_GPCM_ACS_DIV2 \ + | OR_GPCM_XACS \ + | OR_GPCM_SCY_15 \ + | OR_GPCM_TRLX_SET \ + | OR_GPCM_EHTR_SET \ + | OR_GPCM_EAD) + /* 0xFF806FF7 */ -#define CONFIG_SYS_OR0_PRELIM 0xFF806FF7 /* 8 MB flash size */ /* window base at flash base */ #define CONFIG_SYS_LBLAWBAR0_PRELIM CONFIG_SYS_FLASH_BASE -#define CONFIG_SYS_LBLAWAR0_PRELIM 0x80000016 /* 8 MB window size */ +#define CONFIG_SYS_LBLAWAR0_PRELIM (LBLAWAR_EN | LBLAWAR_8MB) #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_SECT 64 /* sectors per device */ @@ -212,15 +223,15 @@ * * 0 4 8 12 16 20 24 28 * 1111 0000 0000 0000 0001 1000 0110 0001 = F0001861 - * - * FIXME: CONFIG_SYS_LBC_SDRAM_BASE should be masked and OR'ed into - * FIXME: the top 17 bits of BR2. */ - /* Port-size=32bit, MSEL=SDRAM */ -#define CONFIG_SYS_BR2_PRELIM 0xF0001861 -#define CONFIG_SYS_LBLAWBAR2_PRELIM 0xF0000000 -#define CONFIG_SYS_LBLAWAR2_PRELIM 0x80000019 /* 64M */ +#define CONFIG_SYS_BR2_PRELIM (CONFIG_SYS_LBC_SDRAM_BASE \ + | BR_PS_32 \ + | BR_MS_SDRAM \ + | BR_V) + /* 0xF0001861 */ +#define CONFIG_SYS_LBLAWBAR2_PRELIM CONFIG_SYS_LBC_SDRAM_BASE +#define CONFIG_SYS_LBLAWAR2_PRELIM (LBLAWAR_EN | LBLAWAR_64MB) /* * The SDRAM size in MB, CONFIG_SYS_LBC_SDRAM_SIZE, is 64. @@ -236,7 +247,12 @@ * 1111 1100 0000 0000 0110 1001 0000 0001 = FC006901 */ -#define CONFIG_SYS_OR2_PRELIM 0xFC006901 +#define CONFIG_SYS_OR2_PRELIM (MEG_TO_AM(CONFIG_SYS_LBC_SDRAM_SIZE) \ + | OR_SDRAM_XAM \ + | ((9 - OR_SDRAM_MIN_COLS) << OR_SDRAM_COLS_SHIFT) \ + | ((13 - OR_SDRAM_MIN_ROWS) << OR_SDRAM_ROWS_SHIFT) \ + | OR_SDRAM_EAD) + /* 0xFC006901 */ /* LB sdram refresh timer, about 6us */ #define CONFIG_SYS_LBC_LSRT 0x32000000 @@ -615,12 +631,15 @@ | BATU_VS \ | BATU_VP) -/* SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */ -#define CONFIG_SYS_IBAT6L (0xF0000000 \ +/* LBC SDRAM @ 0xF0000000, stack in DCACHE 0xFDF00000 & FLASH @ 0xFE000000 */ +#define CONFIG_SYS_IBAT6L (CONFIG_SYS_LBC_SDRAM_BASE \ | BATL_PP_RW \ | BATL_MEMCOHERENCE \ | BATL_GUARDEDSTORAGE) -#define CONFIG_SYS_IBAT6U (0xF0000000 | BATU_BL_256M | BATU_VS | BATU_VP) +#define CONFIG_SYS_IBAT6U (CONFIG_SYS_LBC_SDRAM_BASE \ + | BATU_BL_256M \ + | BATU_VS \ + | BATU_VP) #define CONFIG_SYS_IBAT7L (0) #define CONFIG_SYS_IBAT7U (0) |
