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| author | Aneesh V <aneesh@ti.com> | 2011-06-16 23:30:52 +0000 |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-07-04 10:55:25 +0200 |
| commit | 8b457fa828971ac036b15e98e65d99b6354c5496 (patch) | |
| tree | 6b79627efe11e2c39e91682ac8e16849c6a60f2d /include/configs/omap4_sdp4430.h | |
| parent | 93bc21930a1bfbc98e3121035207eafa427ee07f (diff) | |
| download | talos-obmc-uboot-8b457fa828971ac036b15e98e65d99b6354c5496.tar.gz talos-obmc-uboot-8b457fa828971ac036b15e98e65d99b6354c5496.zip | |
armv7: adapt omap4 to the new cache maintenance framework
adapt omap4 to the new layered cache maintenance framework
Signed-off-by: Aneesh V <aneesh@ti.com>
Diffstat (limited to 'include/configs/omap4_sdp4430.h')
| -rw-r--r-- | include/configs/omap4_sdp4430.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/include/configs/omap4_sdp4430.h b/include/configs/omap4_sdp4430.h index 0ac407aad3..68ffa87f1c 100644 --- a/include/configs/omap4_sdp4430.h +++ b/include/configs/omap4_sdp4430.h @@ -46,9 +46,6 @@ #define CONFIG_DISPLAY_CPUINFO 1 #define CONFIG_DISPLAY_BOARDINFO 1 -/* Keep L2 Cache Disabled */ -#define CONFIG_SYS_L2CACHE_OFF 1 - /* Clock Defines */ #define V_OSCK 38400000 /* Clock output from T2 */ #define V_SCLK V_OSCK @@ -241,4 +238,9 @@ CONFIG_SYS_INIT_RAM_SIZE - \ GENERATED_GBL_DATA_SIZE) +#ifndef CONFIG_SYS_L2CACHE_OFF +#define CONFIG_SYS_L2_PL310 1 +#define CONFIG_SYS_PL310_BASE 0x48242000 +#endif + #endif /* __CONFIG_H */ |
