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| author | Marian Balakowicz <m8@semihalf.com> | 2007-11-15 13:29:55 +0100 |
|---|---|---|
| committer | Marian Balakowicz <m8@semihalf.com> | 2007-11-15 13:29:55 +0100 |
| commit | 5fb6d7191e206cdde0e23140fd8111caed93a595 (patch) | |
| tree | 957d4bec905f329c786ff5d3785462a527576e72 /include/configs/inka4x0.h | |
| parent | f23cb34c367bb27585a4fdb8a75277370e7d0596 (diff) | |
| download | talos-obmc-uboot-5fb6d7191e206cdde0e23140fd8111caed93a595.tar.gz talos-obmc-uboot-5fb6d7191e206cdde0e23140fd8111caed93a595.zip | |
[INKA4x0] NG hardware: SDRAM support
Add support for three new DDR chips that may be present on a NG
INKA4x0 hardware: HYB25D512160BF-5, K4H511638C-7CB3, T46V32M16BN-6IT.
Cleanup board/inka4x0/mt48lc16m16a2-75.h file.
Signed-off-by: Marian Balakowicz <m8@semihalf.com>
Diffstat (limited to 'include/configs/inka4x0.h')
| -rw-r--r-- | include/configs/inka4x0.h | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/include/configs/inka4x0.h b/include/configs/inka4x0.h index af8fb21e27..1617cd49a6 100644 --- a/include/configs/inka4x0.h +++ b/include/configs/inka4x0.h @@ -183,7 +183,14 @@ #define CFG_SDRAM_BASE 0x00000000 #define CFG_DEFAULT_MBAR 0x80000000 -#define CONFIG_MPC5200_DDR +/* + * SDRAM controller configuration + */ +#undef CONFIG_SDR_MT48LC16M16A2 +#undef CONFIG_DDR_MT46V16M16 +#undef CONFIG_DDR_MT46V32M16 +#undef CONFIG_DDR_HYB25D512160BF +#define CONFIG_DDR_K4H511638C /* Use ON-Chip SRAM until RAM will be available */ #define CFG_INIT_RAM_ADDR MPC5XXX_SRAM |
