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authorSimon Glass <sjg@chromium.org>2014-10-07 22:01:46 -0600
committerMinkyu Kang <mk7.kang@samsung.com>2014-10-08 17:25:47 +0900
commit87033d4d97e0cc569c59efef7ce4ce940c48e71b (patch)
tree57c0262b5ba1dff48448a1dc292f89da718c072c /include/configs/exynos5420-common.h
parent5ea01ab10dcdab41d1bfb1972b4b2298d5a26fcf (diff)
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exynos: Move common smdk5420 things to common file
A few things are common but are not in the common file. Fix this and rename the file to fit with the other exynos*-common files. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'include/configs/exynos5420-common.h')
-rw-r--r--include/configs/exynos5420-common.h50
1 files changed, 50 insertions, 0 deletions
diff --git a/include/configs/exynos5420-common.h b/include/configs/exynos5420-common.h
new file mode 100644
index 0000000000..27e7edc577
--- /dev/null
+++ b/include/configs/exynos5420-common.h
@@ -0,0 +1,50 @@
+/*
+ * Copyright (C) 2013 Samsung Electronics
+ *
+ * Configuration settings for the SAMSUNG EXYNOS5420 SoC
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CONFIG_EXYNOS5420_H
+#define __CONFIG_EXYNOS5420_H
+
+#define CONFIG_EXYNOS5420
+
+#include <configs/exynos5-common.h>
+
+#define MACH_TYPE_SMDK5420 8002
+#define CONFIG_MACH_TYPE MACH_TYPE_SMDK5420
+
+#define CONFIG_VAR_SIZE_SPL
+
+#define CONFIG_SYS_SDRAM_BASE 0x20000000
+#define CONFIG_SYS_TEXT_BASE 0x23E00000
+#ifdef CONFIG_VAR_SIZE_SPL
+#define CONFIG_SPL_TEXT_BASE 0x02024410
+#else
+#define CONFIG_SPL_TEXT_BASE 0x02024400
+#endif
+#define CONFIG_IRAM_TOP 0x02074000
+
+#define CONFIG_SPL_MAX_FOOTPRINT (30 * 1024)
+
+#define CONFIG_DEVICE_TREE_LIST "exynos5420-peach-pit exynos5420-smdk5420"
+
+#define CONFIG_MAX_I2C_NUM 11
+
+#define CONFIG_BOARD_REV_GPIO_COUNT 2
+
+#define CONFIG_BOOTCOMMAND "mmc read 20007000 451 2000; bootm 20007000"
+
+/*
+ * Put the initial stack pointer 1KB below this to allow room for the
+ * SPL marker. This value is arbitrary, but gd_t is placed starting here.
+ */
+#define CONFIG_SYS_INIT_SP_ADDR (CONFIG_IRAM_TOP - 0x800)
+
+/* DRAM Memory Banks */
+#define CONFIG_NR_DRAM_BANKS 7
+#define SDRAM_BANK_SIZE (512UL << 20UL) /* 512 MB */
+
+#endif /* __CONFIG_EXYNOS5420_H */
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